8V79S674 Series

Differential-to-3.3V, 2.5V LVPECL Clock Divider and Fanout Buffer

Manufacturer: Renesas Electronics Corporation

Catalog

Differential-to-3.3V, 2.5V LVPECL Clock Divider and Fanout Buffer

Part	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Supplier Device Package	Frequency - Max [Max]	Output	Type	Ratio - Input:Output	Number of Circuits	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case	Input	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]
Renesas Electronics Corporation 8V79S674NLGI			20-VFQFPN (4x4)	2.5 GHz	LVPECL	Divider Fanout Buffer (Distribution)	1:4	1	2.625 V 3.465 V	2.375 V 3.135 V	20-VFQFN Exposed Pad	LVCMOS LVTTL	Surface Mount	85 °C	-40 °C

Catalog

Differential-to-3.3V, 2.5V LVPECL Clock Divider and Fanout Buffer

Description

The 8V79S674 is a clock divider and fanout buffer designed for clock signal division in wireless base station radio equipment boards. The device is optimized to deliver excellent additive phase jitter performance. The 8V79S674 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection. It offers the frequency division by ÷1, ÷2, ÷4 and ÷8. Four low-skew LVPECL outputs are available and support clock output frequencies up to 2.5GHz (÷1 frequency division). Outputs can be disabled to save power consumption if not used. The device is packaged in a lead-free (RoHS 6) 20-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication, and networking end equipment requirements.