
ADG1206LYCPZ-REEL7
ActiveLOW CAPACITANCE, 16-CHANNEL ICMOS MULTIPLEXER WITH 1.2 V AND 1.8 V JEDEC LOGIC COMPLIANCE
Deep-Dive with AI
Search across all available documentation for this part.

ADG1206LYCPZ-REEL7
ActiveLOW CAPACITANCE, 16-CHANNEL ICMOS MULTIPLEXER WITH 1.2 V AND 1.8 V JEDEC LOGIC COMPLIANCE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADG1206LYCPZ-REEL7 |
|---|---|
| -3db Bandwidth | 280 MHz |
| Channel-to-Channel Matching (ΔRon) | 3.5 Ohm |
| Charge Injection | 0.6 pC |
| Crosstalk | -75 dB |
| Current - Leakage (IS(off)) (Max) [Max] | 200 pA |
| Mounting Type | Surface Mount |
| Multiplexer/Demultiplexer Circuit | 16:1 |
| Number of Circuits | 1 |
| On-State Resistance (Max) [Max] | 200 Ohm |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 32-WFQFN Exposed Pad, CSP |
| Supplier Device Package | 32-LFCSP-WQ (5x5) |
| Voltage - Supply, Dual (V±) [Max] | 16.5 V |
| Voltage - Supply, Dual (V±) [Min] | -5 V |
| Voltage - Supply, Single (V+) [Max] | 16.5 V |
| Voltage - Supply, Single (V+) [Min] | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 15.31 | |
| 10 | $ 10.93 | |||
| 25 | $ 9.81 | |||
| 100 | $ 8.55 | |||
| 250 | $ 7.94 | |||
| 500 | $ 7.57 | |||
| Digi-Reel® | 1 | $ 15.31 | ||
| 10 | $ 10.93 | |||
| 25 | $ 9.81 | |||
| 100 | $ 8.55 | |||
| 250 | $ 7.94 | |||
| 500 | $ 7.57 | |||
| Tape & Reel (TR) | 1500 | $ 7.45 | ||
Description
General part information
ADG1206L Series
The ADG1206L/ADG1207Lare monolithic iCMOS®analog multiplexers comprising sixteen single channels and eight differential channels, respectively. The ADG1206L switches one of sixteen inputs to a common output, as determined by the 4‑bit binary address lines A0, A1, A2, and A3. The ADG1207L switches one of eight differential inputs to a common differential output, as determined by the 3-bit binary address lines A0, A1, and A2. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. When on, each channel conducts equally well in both directions and has an input signal range that extends to the supplies.An external low voltage (VL) supply provides flexibility for lower logic control. The ADG1206L/ADG1207L are both 1.2 V and 1.8 V JEDEC standard compliant.APPLICATIONSAudio and video routingAutomatic test equipmentData acquisition systemsBattery-powered systemsSample-and-hold systemsCommunication systemsFPGA and microcontroller systems