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Integrated Circuits (ICs)

AM6254ATLHJAMKR

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GENERAL PURPOSE SYSTEM IN PACKAGE WITH ARM® CORTEX®-A53 AND INTEGRATED LPDDR4

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Search across all available documentation for this part.

DocumentsHow the AM625SIP Processor Accelerates Development by Integrating LPDDR4 (Rev. A)AM625SIP 프로세서가 LPDDR4를 통합하여 개발을 가속화하는 방법 (Rev. A)+13

Integrated Circuits (ICs)

AM6254ATLHJAMKR

Active

Texas Instruments

GENERAL PURPOSE SYSTEM IN PACKAGE WITH ARM® CORTEX®-A53 AND INTEGRATED LPDDR4

Deep-Dive with AI

DocumentsHow the AM625SIP Processor Accelerates Development by Integrating LPDDR4 (Rev. A)AM625SIP 프로세서가 LPDDR4를 통합하여 개발을 가속화하는 방법 (Rev. A)+13

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	AM6254ATLHJAMKR

Additional Interfaces	UART/USART, SPDIF, MMC/SD, QSPI, TDM, SPI, DMA, I2S, I2C, GPIO
Co-Processors/DSP	GPU, ARM® Cortex®-M4F
Core Processor	ARM® Cortex®-A53
Display & Interface Controllers	LVDS, MIPI-DPI, OLDI, MIPI/CSI
Ethernet	10 Mbps, 1000 Mbps, 100 Mbps
Ethernet	2
Graphics Acceleration	True
Mounting Type	Surface Mount
Number of Cores/Bus Width [custom]	64 Bit
Number of Cores/Bus Width [custom]	4
Operating Temperature [Max]	95 °C
Operating Temperature [Min]	-40 °C
Package / Case	FCCSPBGA, 425-TFBGA
RAM Controllers	LPDDR4
Security Features	DRBG, PKA, AES, SMS, SHA2, Cryptography, Random Number Generator, ARM TZ, ECC, MD5, RSA, Secure Boot
Speed	1.4 GHz
Supplier Device Package	425-FCCSP (13x13)
USB	USB 2.0 (2)
Voltage - I/O	1.1 V

AM625SIP Series

General purpose system in package with Arm® Cortex®-A53 and integrated LPDDR4

Part	Co-Processors/DSP	Package / Case	Core Processor	Security Features	Speed	USB	Display & Interface Controllers	Graphics Acceleration	Ethernet	Ethernet	Additional Interfaces	RAM Controllers	Voltage - I/O	Number of Cores/Bus Width [custom]	Number of Cores/Bus Width [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Mounting Type
Texas Instruments AM6254ATLHJAMKR	ARM® Cortex®-M4F GPU	425-TFBGA FCCSPBGA	ARM® Cortex®-A53	AES ARM TZ Cryptography DRBG ECC MD5 PKA Random Number Generator RSA Secure Boot SHA2 SMS	1.4 GHz	USB 2.0 (2)	LVDS MIPI-DPI MIPI/CSI OLDI		10 Mbps 100 Mbps 1000 Mbps	2	DMA GPIO I2C I2S MMC/SD QSPI SPDIF SPI TDM UART/USART	LPDDR4	1.1 V	64 Bit	4	95 °C	-40 °C	425-FCCSP (13x13)	Surface Mount

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	1000	$ 26.19
Texas Instruments	LARGE T&R	1	$ 30.52
		100	$ 27.13
		250	$ 22.30
		1000	$ 19.95

Description

General part information

AM625SIP Series

AM625SIP is a System In Package (SIP) derivative of the ALW packaged AM6254 device, with the addition of an integrated LPDDR4 SDRAM. This document only defines differences or exceptions to the ALW packaged AM6254 device defined inAM62x Sitara Processors Datasheet(revision B or later).

The AM625SIP (System in Package) Sitara™ MPU with integrated LPDDR4 is an application processor built for Linux development. The system in package integrates 512MB of LPDDR4 with the AM6254 device which has 4x Arm® Cortex®-A53 performance and embedded features, such as: dual-display support, 3D graphics acceleration, along with an extensive set of peripherals that make the System in package well-suited for a broad range of industrial applications while offering intelligent features and optimized power architecture. Additionally, the AM625SIP offers a simplified hardware design, increased robustness, optimized size/system BOM, and power consumption savings all enabling faster software and hardware development.

Some of these applications include:

Documents

Technical documentation and resources

How the AM625SIP Processor Accelerates Development by Integrating LPDDR4 (Rev. A)

Application brief

AM625SIP 프로세서가 LPDDR4를 통합하여 개발을 가속화하는 방법 (Rev. A)

Application brief

Minimal Platform Development on AM62x Devices (Rev. A)

Application note

AM62x, AM62Ax, AM62D-Q1 and AM62Px Processor Families Schematic, Design Guidelines and Review Checklist (Rev. H)

Application note

AM625, AM623, AM625SIP, AM625-Q1, AM620-Q1 Schematic Design Guidelines and Schematic Review Checklist (Rev. A)

Application note

AM62x Sitara Errata (Rev. F)

Errata

AM625SIP – AM6254 Sitara™ Processor with Integrated LPDDR4 SDRAM datasheet (Rev. A)

Data sheet

Hardware Design Considerations for Custom Board Using AM625, AM623, AM625SIP, AM625-Q1, AM620-Q1 Processor (Rev. C)

User guide

Powering the AM625SIP With the TPS65219 PMIC

Application note

AM625SIP 處理器如何透過整合 LPDDR4，加快開發速度 (Rev. A)

Application brief

AM6254ATLHJAMKR

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AM6254ATLHJAMKR

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Technical Specifications

AM625SIP Series

Pricing

Description

AM625SIP Series

Documents

How the AM625SIP Processor Accelerates Development by Integrating LPDDR4 (Rev. A)

AM625SIP 프로세서가 LPDDR4를 통합하여 개발을 가속화하는 방법 (Rev. A)

Minimal Platform Development on AM62x Devices (Rev. A)

AM62x, AM62Ax, AM62D-Q1 and AM62Px Processor Families Schematic, Design Guidelines and Review Checklist (Rev. H)

AM62x Power Consumption

AM62x Sitara Processors Technical Reference Manual (Rev. B)

AM625SIP: System In Package Explained

Enabling Matter on Sitara MPU

Securing Arm-Based Application Processors (Rev. F)

AM625, AM623, AM625SIP, AM625-Q1, AM620-Q1 Schematic Design Guidelines and Schematic Review Checklist (Rev. A)

AM62x Sitara Errata (Rev. F)

AM625SIP – AM6254 Sitara™ Processor with Integrated LPDDR4 SDRAM datasheet (Rev. A)

Hardware Design Considerations for Custom Board Using AM625, AM623, AM625SIP, AM625-Q1, AM620-Q1 Processor (Rev. C)

Powering the AM625SIP With the TPS65219 PMIC

AM625SIP 處理器如何透過整合 LPDDR4，加快開發速度 (Rev. A)

AM625SIP Series