ADS5562IRGZT
Active16-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) WITH HIGH SNR AND CMOS/LVDS OUTPUTS
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ADS5562IRGZT
Active16-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC) WITH HIGH SNR AND CMOS/LVDS OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS5562IRGZT |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | LVDS - Parallel, Parallel |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 16 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 48-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 80 M |
| Supplier Device Package | 48-VQFN (7x7) |
| Voltage - Supply, Analog [Max] | 3.6 V |
| Voltage - Supply, Analog [Min] | 3 V |
| Voltage - Supply, Digital [Max] | 3.6 V |
| Voltage - Supply, Digital [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 78.87 | |
| 10 | $ 74.92 | |||
| 25 | $ 72.95 | |||
| 100 | $ 67.53 | |||
| Digi-Reel® | 1 | $ 78.87 | ||
| 10 | $ 74.92 | |||
| 25 | $ 72.95 | |||
| 100 | $ 67.53 | |||
| Tape & Reel (TR) | 250 | $ 65.56 | ||
| Texas Instruments | SMALL T&R | 1 | $ 74.67 | |
| 100 | $ 66.37 | |||
| 250 | $ 54.56 | |||
| 1000 | $ 48.80 | |||
Description
General part information
ADS5562 Series
The ADS556x is a high-performance 16-bit family of ADCs with sampling rates up to 80 MSPS. The device supports very-high SNR for input frequencies in the first Nyquist zone. The device includes a low-frequency noise suppression mode that improves the noise from DC to about 1 MHz.
In addition to high performance, the device offers several flexible features such as output interface (either Double Data Rate [DDR] LVDS or parallel CMOS) and fine gain in 1-dB steps until 6-dB maximum gain.
Innovative techniques, such as DDR LVDS and an internal reference that does not require external decoupling capacitors, have been used to achieve significant savings in pin count. This innovation results in a compact 7-mm × 7-mm 48-pin VQFN package.
Documents
Technical documentation and resources
