Development Boards, Kits, Programmers

ADS5562EVM

Obsolete

Texas Instruments

EVAL MODULE FOR ADS5562

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsDatasheet

Development Boards, Kits, Programmers

ADS5562EVM

Obsolete

Texas Instruments

EVAL MODULE FOR ADS5562

Deep-Dive with AI

DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	ADS5562EVM

Data Interface	Serial, Parallel
Input Range	3.56 Vpp
Number of A/D Converters	1
Number of Bits	16
Sampling Rate (Per Second)	80 M
Supplied Contents	Board(s)
Utilized IC / Part	ADS5562

ADS5562 Series

16-bit, 80-MSPS analog-to-digital converter (ADC) with high SNR and CMOS/LVDS outputs

Part	Input Type	Supplier Device Package	Number of A/D Converters	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Sampling Rate (Per Second)	Configuration	Architecture	Operating Temperature [Max]	Operating Temperature [Min]	Number of Inputs	Ratio - S/H:ADC	Reference Type	Package / Case	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Data Interface	Number of Bits	Mounting Type	Supplied Contents	Utilized IC / Part	Input Range
Texas Instruments ADS5562IRGZT	Differential	48-VQFN (7x7)	1	3.6 V	3 V	80 M	S/H-ADC	Pipelined	85 °C	-40 °C	1	1:1	Internal	48-VFQFN Exposed Pad	3.6 V	3 V	LVDS - Parallel Parallel	16	Surface Mount
Texas Instruments ADS5562IRGZR	Differential	48-VQFN (7x7)	1	3.6 V	3 V	80 M	S/H-ADC	Pipelined	85 °C	-40 °C	1	1:1	Internal	48-VFQFN Exposed Pad	3.6 V	3 V	LVDS - Parallel Parallel	16	Surface Mount
Texas Instruments ADS5562EVM			1			80 M											Parallel Serial	16		Board(s)	ADS5562	3.56 Vpp

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Box	1	$ 358.80

Description

General part information

ADS5562 Series

The ADS556x is a high-performance 16-bit family of ADCs with sampling rates up to 80 MSPS. The device supports very-high SNR for input frequencies in the first Nyquist zone. The device includes a low-frequency noise suppression mode that improves the noise from DC to about 1 MHz.

In addition to high performance, the device offers several flexible features such as output interface (either Double Data Rate [DDR] LVDS or parallel CMOS) and fine gain in 1-dB steps until 6-dB maximum gain.

Innovative techniques, such as DDR LVDS and an internal reference that does not require external decoupling capacitors, have been used to achieve significant savings in pin count. This innovation results in a compact 7-mm × 7-mm 48-pin VQFN package.

Documents

Technical documentation and resources