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8-SO
Integrated Circuits (ICs)

M24512E-FMN6TP

Active
STMicroelectronics

512KBIT SERIAL I2C BUS EEPROM WITH CONFIGURABLE DEVICE ADDRESS AND SOFTWARE WRITE PROTECTION REGISTERS

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Search across all available documentation for this part.

DocumentsDatasheet+11
8-SO
Integrated Circuits (ICs)

M24512E-FMN6TP

Active
STMicroelectronics

512KBIT SERIAL I2C BUS EEPROM WITH CONFIGURABLE DEVICE ADDRESS AND SOFTWARE WRITE PROTECTION REGISTERS

Deep-Dive with AI

DocumentsDatasheet+11

Technical Specifications

Parameters and characteristics for this part

SpecificationM24512E-FMN6TP
Access Time450 ns
Memory FormatEEPROM
Memory InterfaceI2C
Memory Organization64K x 8
Memory Size64 kb
Memory TypeNon-Volatile
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case8-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package8-SO
TechnologyEEPROM
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.6 V
Write Cycle Time - Word, Page4 ms

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.30
10$ 0.30
25$ 0.28
50$ 0.28
100$ 0.24
250$ 0.24
500$ 0.24
1000$ 0.23
Digi-Reel® 1$ 0.34
10$ 0.30
25$ 0.29
50$ 0.28
100$ 0.27
250$ 0.25
500$ 0.24
1000$ 0.24
Tape & Reel (TR) 2500$ 0.23
5000$ 0.21
12500$ 0.20
25000$ 0.20
NewarkEach (Supplied on Cut Tape) 1$ 0.40
10$ 0.38
25$ 0.37
50$ 0.36
100$ 0.36
250$ 0.35
500$ 0.34
1000$ 0.34

Description

General part information

M24512-A125 Series

The M24512-A125 is a 512-Kbit serial EEPROM Automotive grade device operating up to 125 °C. The M24512-A125 is compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 1.

The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.

The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M24512-A125 is a byte-alterable memory (64 K × 8 bits) organized as 512 pages of 128 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.