
ADC08DL500CIVV/NOPB
ActiveDUAL-CHANNEL, 8-BIT, 500-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)
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ADC08DL500CIVV/NOPB
ActiveDUAL-CHANNEL, 8-BIT, 500-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)
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Technical Specifications
Parameters and characteristics for this part
| Specification | ADC08DL500CIVV/NOPB |
|---|---|
| Architecture | Folding Interpolating |
| Configuration | MUX-S/H-ADC |
| Data Interface | LVDS - Parallel |
| Features | Simultaneous Sampling |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 2 |
| Number of Bits | 8 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 144-LQFP |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 500 M |
| Supplier Device Package | 144-LQFP (20x20) |
| Voltage - Supply, Analog [Max] | 2 V |
| Voltage - Supply, Analog [Min] | 1.8 V |
| Voltage - Supply, Digital [Max] | 2 V |
| Voltage - Supply, Digital [Min] | 1.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 7 | $ 48.30 | |
| Tray | 60 | $ 50.66 | ||
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 58.84 | |
| 100 | $ 52.30 | |||
| 250 | $ 42.99 | |||
| 1000 | $ 38.46 | |||
Description
General part information
ADC08DL500 Series
The ADC08DL500 is a dual, low power, high performance, CMOS analog-to-digital converter. The ADC08DL500 digitizes signals to 8 bits of resolution at sample rates up to 500 MSPS. Consuming a typical 1.2 Watts in demultiplex mode at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2EffectiveNumber of Bits (ENOB) with a 125 MHz input signal and a 500 MHz sample rate while providing a10−18CodeErrorRate (C.E.R.)
The converter typically consumes 3.3 mW in the Power Down Mode and is available in a lead-free 144-lead LQFP and operates over the modified Industrial (-40°C≤TA≤+70°C) temperature range.
The ADC08DL500 is a dual, low power, high performance, CMOS analog-to-digital converter. The ADC08DL500 digitizes signals to 8 bits of resolution at sample rates up to 500 MSPS. Consuming a typical 1.2 Watts in demultiplex mode at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2EffectiveNumber of Bits (ENOB) with a 125 MHz input signal and a 500 MHz sample rate while providing a10−18CodeErrorRate (C.E.R.)
Documents
Technical documentation and resources