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ADC08DL500

ADC08DL500 Series

Dual-Channel, 8-Bit, 500-MSPS Analog-to-Digital Converter (ADC)

Manufacturer: Texas Instruments

Catalog

Dual-Channel, 8-Bit, 500-MSPS Analog-to-Digital Converter (ADC)

Key Features

Single +1.9V ±0.1V OperationDuty Cycle Corrected Sample ClockKey SpecificationsResolution8 BitsMax Conversion Rate500 MSPSCode Error Rate10−18(typ)ENOB @ 125 MHz Input7.2 Bits (typ)DNL±0.15 LSB (typ)Power ConsumptionOperating in 1:2 Demux Output1.25W (typ)Power Down Mode3.3 mW (typ)Single +1.9V ±0.1V OperationDuty Cycle Corrected Sample ClockKey SpecificationsResolution8 BitsMax Conversion Rate500 MSPSCode Error Rate10−18(typ)ENOB @ 125 MHz Input7.2 Bits (typ)DNL±0.15 LSB (typ)Power ConsumptionOperating in 1:2 Demux Output1.25W (typ)Power Down Mode3.3 mW (typ)

Description

AI
The ADC08DL500 is a dual, low power, high performance, CMOS analog-to-digital converter. The ADC08DL500 digitizes signals to 8 bits of resolution at sample rates up to 500 MSPS. Consuming a typical 1.2 Watts in demultiplex mode at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2EffectiveNumber of Bits (ENOB) with a 125 MHz input signal and a 500 MHz sample rate while providing a10−18CodeErrorRate (C.E.R.) The converter typically consumes 3.3 mW in the Power Down Mode and is available in a lead-free 144-lead LQFP and operates over the modified Industrial (-40°C≤TA≤+70°C) temperature range. The ADC08DL500 is a dual, low power, high performance, CMOS analog-to-digital converter. The ADC08DL500 digitizes signals to 8 bits of resolution at sample rates up to 500 MSPS. Consuming a typical 1.2 Watts in demultiplex mode at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2EffectiveNumber of Bits (ENOB) with a 125 MHz input signal and a 500 MHz sample rate while providing a10−18CodeErrorRate (C.E.R.) The converter typically consumes 3.3 mW in the Power Down Mode and is available in a lead-free 144-lead LQFP and operates over the modified Industrial (-40°C≤TA≤+70°C) temperature range.