SN74HC595ANSR
Active8-BIT SHIFT REGISTER/LATCH 3-STATE SIPO
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SN74HC595ANSR
Active8-BIT SHIFT REGISTER/LATCH 3-STATE SIPO
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HC595ANSR |
|---|---|
| Function | Serial to Parallel, Serial |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 0.209 " |
| Package / Case | 16-SOIC |
| Package / Case | 5.3 mm |
| Supplier Device Package | 16-SO |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.73 | |
| 10 | $ 0.64 | |||
| 25 | $ 0.60 | |||
| 100 | $ 0.49 | |||
| 250 | $ 0.46 | |||
| 500 | $ 0.39 | |||
| 1000 | $ 0.31 | |||
| Digi-Reel® | 1 | $ 0.73 | ||
| 10 | $ 0.64 | |||
| 25 | $ 0.60 | |||
| 100 | $ 0.49 | |||
| 250 | $ 0.46 | |||
| 500 | $ 0.39 | |||
| 1000 | $ 0.31 | |||
| Tape & Reel (TR) | 2000 | $ 0.28 | ||
| 6000 | $ 0.26 | |||
| 10000 | $ 0.25 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.61 | |
| 100 | $ 0.41 | |||
| 250 | $ 0.32 | |||
| 1000 | $ 0.21 | |||
Description
General part information
SN74HC595B Series
The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’.
The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’.
Documents
Technical documentation and resources
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