SN74HC595BRWNR
ActiveSHIFT REGISTER SINGLE 8-BIT SERIAL TO SERIAL/PARALLEL 16-PIN X1QFN EP T/R
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SN74HC595BRWNR
ActiveSHIFT REGISTER SINGLE 8-BIT SERIAL TO SERIAL/PARALLEL 16-PIN X1QFN EP T/R
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HC595BRWNR |
|---|---|
| Function | Serial to Parallel |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Tri-State |
| Package / Case | 16-XFQFN Exposed Pad |
| Supplier Device Package | 16-X1QFN (2.5x2.5) |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.45 | |
| 10 | $ 0.40 | |||
| 25 | $ 0.37 | |||
| 100 | $ 0.30 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.24 | |||
| 1000 | $ 0.21 | |||
| Digi-Reel® | 1 | $ 0.45 | ||
| 10 | $ 0.40 | |||
| 25 | $ 0.37 | |||
| 100 | $ 0.30 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.24 | |||
| 1000 | $ 0.21 | |||
| Tape & Reel (TR) | 2000 | $ 0.21 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.29 | |
| 100 | $ 0.20 | |||
| 250 | $ 0.15 | |||
| 1000 | $ 0.10 | |||
Description
General part information
SN74HC595B Series
The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’.
The SN74HC595B devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the all outputs are in the high-impedance state except QH’.
Documents
Technical documentation and resources
