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32 LFCSP
Integrated Circuits (ICs)

ADAU1361BCPZ-R7

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Analog Devices

STEREO, LOW POWER, 96 KHZ, 24-BIT AUDIO CODEC WITH INTEGRATED PLL

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32 LFCSP
Integrated Circuits (ICs)

ADAU1361BCPZ-R7

Active
Analog Devices

STEREO, LOW POWER, 96 KHZ, 24-BIT AUDIO CODEC WITH INTEGRATED PLL

Technical Specifications

Parameters and characteristics for this part

SpecificationADAU1361BCPZ-R7
Data InterfaceSerial
Mounting TypeSurface Mount
Number of ADCs / DACs [custom]2
Number of ADCs / DACs [custom]2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case32-VFQFN Exposed Pad, CSP
Resolution (Bits)24 b
Sigma DeltaFalse
Supplier Device Package32-LFCSP-VQ (5x5)
TypeAudio
Voltage - Supply, Analog [Max]3.6 V
Voltage - Supply, Analog [Min]1.8 V
Voltage - Supply, Digital [Max]3.6 V
Voltage - Supply, Digital [Min]1.8 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 13.59
10$ 9.41
25$ 8.32
100$ 7.09
250$ 6.90
Digi-Reel® 1$ 13.59
10$ 9.41
25$ 8.32
100$ 7.09
250$ 6.90
Tape & Reel (TR) 1500$ 6.90
NewarkEach (Supplied on Cut Tape) 1$ 13.04
10$ 9.41
25$ 8.32
50$ 7.71
100$ 7.29
250$ 7.02

Description

General part information

ADAU1361 Series

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.ApplicationsSmartphones/Multimedia phonesDigital Still Cameras/Digital Video CamerasPortable Media Players/Portable Audio PlayersPhone accessories products