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Integrated Circuits (ICs)

LMK05318BTRGZRQ1

Active
Texas Instruments

AUTOMOTIVE ULTRA-LOW JITTER NETWORK SYNCHRONIZER AND CLOCK GENERATOR

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DocumentsDatasheet
296-4229025-DFG-4.JPG
Integrated Circuits (ICs)

LMK05318BTRGZRQ1

Active
Texas Instruments

AUTOMOTIVE ULTRA-LOW JITTER NETWORK SYNCHRONIZER AND CLOCK GENERATOR

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationLMK05318BTRGZRQ1
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Divider/MultiplierYes/No
Frequency - Max [Max]1.25 GHz
InputLVDS, LVCMOS, LVPECL
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
OutputLVDS, LVPECL, HCSL, HSDS, LVCMOS
Package / Case48-VFQFN Exposed Pad
PLLTrue
Ratio - Input:Output3:8
Supplier Device Package48-VQFN (7x7)
Voltage - Supply [Max]3.465 V
Voltage - Supply [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 20.47
10$ 18.88
25$ 18.03
100$ 16.12
250$ 15.38
500$ 14.63
Digi-Reel® 1$ 20.47
10$ 18.88
25$ 18.03
100$ 16.12
250$ 15.38
500$ 14.63
Tape & Reel (TR) 2500$ 13.36
Texas InstrumentsLARGE T&R 1$ 17.43
100$ 15.22
250$ 11.74
1000$ 10.50

Description

General part information

LMK05318B-Q1 Series

The LMK05318B-Q1 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links.

The LMK05318B-Q1 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links.

Documents

Technical documentation and resources