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LMK05318B-Q1

LMK05318B-Q1 Series

Automotive ultra-low jitter network synchronizer and clock generator

Manufacturer: Texas Instruments

Catalog

Automotive ultra-low jitter network synchronizer and clock generator

Key Features

AEC-Q100 qualified for automotive applicationsTemperature grade 2: –40°C to 105°CUltra-low jitter BAW VCO based Ethernet clocks50fs typical RMS jitter at 312.5MHz60fs typical RMS jitter at 156.25MHzOne high-performance Digital Phase-Locked Loop (DPLL) paired with two Analog Phase Locked Loops (APLLs):Programmable DPLL loop bandwidth< 1-ppt DCO frequency adjustment step sizeTwo differential or single-ended DPLL inputs1Hz (1-PPS) to 800MHz input frequencyDigital holdover and hitless switchingEight differential outputs with programmable HSDS/LVPECL, LVDS, HSCL and 1.8V LVCMOS output formats.Up to six different output frequencies1Hz (1-PPS) to 1250MHz output frequencyPCIe Gen 1 to 6 compliantI2C or SPI register control busEEPROM for custom system configurations on start-upAEC-Q100 qualified for automotive applicationsTemperature grade 2: –40°C to 105°CUltra-low jitter BAW VCO based Ethernet clocks50fs typical RMS jitter at 312.5MHz60fs typical RMS jitter at 156.25MHzOne high-performance Digital Phase-Locked Loop (DPLL) paired with two Analog Phase Locked Loops (APLLs):Programmable DPLL loop bandwidth< 1-ppt DCO frequency adjustment step sizeTwo differential or single-ended DPLL inputs1Hz (1-PPS) to 800MHz input frequencyDigital holdover and hitless switchingEight differential outputs with programmable HSDS/LVPECL, LVDS, HSCL and 1.8V LVCMOS output formats.Up to six different output frequencies1Hz (1-PPS) to 1250MHz output frequencyPCIe Gen 1 to 6 compliantI2C or SPI register control busEEPROM for custom system configurations on start-up

Description

AI
The LMK05318B-Q1 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links. The LMK05318B-Q1 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links.