
CD74HC109M
ObsoleteHIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
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CD74HC109M
ObsoleteHIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET
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Technical Specifications
Parameters and characteristics for this part
| Specification | CD74HC109M |
|---|---|
| Clock Frequency | 60 MHz |
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Quiescent (Iq) | 4 çA |
| Function | Reset, Set(Preset) |
| Input Capacitance | 10 pF |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Complementary |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Trigger Type | Positive Edge |
| Type | JK Type |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
CD74HC109 Series
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset
| Part | Type | Package / Case | Package / Case [x] | Package / Case [y] | Function | Operating Temperature [Max] | Operating Temperature [Min] | Clock Frequency | Supplier Device Package | Input Capacitance | Trigger Type | Current - Quiescent (Iq) | Number of Elements | Mounting Type | Voltage - Supply [Min] | Voltage - Supply [Max] | Output Type | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Number of Bits per Element | Operating Temperature [Max] | Operating Temperature [Min] | Package / Case | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | JK Type | 16-SOIC | 0.154 in | 3.9 mm | Reset Set(Preset) | 125 °C | -55 °C | 60 MHz | 16-SOIC | 10 pF | Positive Edge | 4 çA | 2 | Surface Mount | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | ||||
Texas Instruments | JK Type | 16-DIP | Reset Set(Preset) | 60 MHz | 16-PDIP | 3 pF | Positive Edge | 4 çA | 2 | Through Hole | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | 85 °C | -40 °C | 0.3 in | 7.62 mm | ||||
Texas Instruments | JK Type | 16-SOIC | 0.154 in | 3.9 mm | Reset Set(Preset) | 125 °C | -55 °C | 60 MHz | 16-SOIC | 10 pF | Positive Edge | 4 çA | 2 | Surface Mount | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | ||||
Texas Instruments | JK Type | 16-SOIC | Reset Set(Preset) | 60 MHz | 16-SO | 3 pF | Positive Edge | 4 çA | 2 | Surface Mount | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | 85 °C | -40 °C | 0.209 " | 5.3 mm | ||||
Texas Instruments | JK Type | 16-SOIC | Reset Set(Preset) | 60 MHz | 16-SO | 3 pF | Positive Edge | 4 çA | 2 | Surface Mount | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | 85 °C | -40 °C | 0.209 " | 5.3 mm | ||||
Texas Instruments | JK Type | 16-DIP | Reset Set(Preset) | 60 MHz | 16-PDIP | 3 pF | Positive Edge | 4 çA | 2 | Through Hole | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | 85 °C | -40 °C | 0.3 in | 7.62 mm | ||||
Texas Instruments | JK Type | 16-SOIC | 0.154 in | 3.9 mm | Reset Set(Preset) | 60 MHz | 16-SOIC | 3 pF | Positive Edge | 4 çA | 2 | Surface Mount | 2 V | 6 V | Complementary | 5.2 mA | 5.2 mA | 1 | 85 °C | -40 °C |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 1.43 | |
| 10 | $ 1.27 | |||
| 40 | $ 1.21 | |||
| 120 | $ 0.99 | |||
| 280 | $ 0.93 | |||
| 398 | $ 0.75 | |||
| 520 | $ 0.82 | |||
| Texas Instruments | TUBE | 1 | $ 1.23 | |
| 100 | $ 0.83 | |||
| 250 | $ 0.64 | |||
| 1000 | $ 0.43 | |||
Description
General part information
CD74HC109 Series
The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).
The flip-flop is set and reset by active-low S\ and R\, respectively. A low on both the set and reset inputs simultaneously will force both Q and Q\ outputs high. However, both set and reset going high simultaneously results in an unpredictable output condition.
The ’HC109 and ’HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).
Documents
Technical documentation and resources