Specification	SN74ACT1284DW

Logic Type	IEEE STD 1284 Translation Transceiver
Mounting Type	Surface Mount
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Supply Voltage [Max]	5.5 V
Supply Voltage [Min]	4.5 V

SN74ACT1284 Series

7-Bit Bus Interfaces With 3-State Outputs

Part	Logic Type	Supplier Device Package	Package / Case	Package / Case [y]	Package / Case [y]	Operating Temperature [Max]	Mounting Type	Supply Voltage [Min]	Supply Voltage [Max]	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74ACT1284DW	IEEE STD 1284 Translation Transceiver	20-SOIC	20-SOIC	0.295 in	7.5 mm	70 °C	Surface Mount	4.5 V	5.5 V
Texas Instruments SN74ACT1284PWG4	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284PW	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284DBR	IEEE STD 1284 Translation Transceiver	20-SSOP	20-SSOP			70 °C	Surface Mount	4.5 V	5.5 V
Texas Instruments SN74ACT1284PWE4	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in
Texas Instruments SN74ACT1284NSR	IEEE STD 1284 Translation Transceiver	20-SO	20-SOIC			70 °C	Surface Mount	4.5 V	5.5 V		0.209 "	5.3 mm
Texas Instruments SN74ACT1284PWR	IEEE STD 1284 Translation Transceiver	20-TSSOP	20-TSSOP	4.4 mm		70 °C	Surface Mount	4.5 V	5.5 V	0.173 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.12
		10	$ 1.00
		25	$ 0.95
		100	$ 0.81
		250	$ 0.76
		500	$ 0.67
Texas Instruments	TUBE	1	$ 1.40
		100	$ 1.07
		250	$ 0.79
		1000	$ 0.57

Description

General part information

SN74ACT1284 Series

The ’ACT1284 devices are designed for asynchronous two-way communication between data buses. The control function minimizes external timing requirements.

The devices allow data transmission in either the A-to-B or the B-to-A direction for bits 1, 2, 3, and 4, depending on the logic level at the direction-control (DIR) input. Bits 5, 6, and 7, however, always transmit in the A-to-B direction.

The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel peripheral-interface specification.

Documents

Technical documentation and resources

SN54ACT1284, SN74ACT1284 datasheet (Rev. D)

Data sheet