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8 SOIC
Integrated Circuits (ICs)

MC100EPT21DG

Active
ON Semiconductor

TRANSLATOR, 2 INPUT, 2.25 NS, 3 V TO 3.6 V, 8 PINS, NSOIC

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8 SOIC
Integrated Circuits (ICs)

MC100EPT21DG

Active
ON Semiconductor

TRANSLATOR, 2 INPUT, 2.25 NS, 3 V TO 3.6 V, 8 PINS, NSOIC

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationMC100EPT21DG
Channel TypeUnidirectional
Channels per Circuit1
Input SignalLVPECL, CML, LVDS
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output SignalLVCMOS, LVTTL
Output TypeNon-Inverted
Package / Case8-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package8-SOIC
Translator TypeMixed Signal

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 10.37
10$ 9.37
98$ 7.41
294$ 6.75
588$ 6.32
1078$ 5.66

Description

General part information

MC100EPT21 Series

The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL/LVDS/CML input levels and LVTTL/LVCMOS output levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.The VBBoutput allows the EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBBoutput tied to the D0 input for a non-inverting buffer or the D0 input for an inverting buffer. When cap coupled differentially, VBBoutput is connected through a resistor to each input pin. If used, the VBBpin should be bypassed to VCCvia a 0.01 F capacitor. For additional information see AND8020. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBBfor a single-ended direct connection.

Documents

Technical documentation and resources