Specification	THS10064CDA

Architecture	Pipelined
Configuration	S/H-MUX-ADC
Data Interface	Parallel
Features	Simultaneous Sampling
Input Type	Single Ended, Differential
Mounting Type	Surface Mount
Number of A/D Converters	1
Number of Bits [custom]	10
Number of Inputs	4, 2
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	32-TSSOP
Ratio - S/H:ADC	4:1
Reference Type	External, Internal
Sampling Rate (Per Second)	6 M
Supplier Device Package	32-TSSOP
Voltage - Supply, Analog	5 V
Voltage - Supply, Digital [Max]	5.25 V
Voltage - Supply, Digital [Min]	3 V

THS10064 Series

10-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Low Power

Part	Configuration	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply, Analog	Architecture	Mounting Type	Package / Case	Number of Bits [custom]	Input Type	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Number of Inputs	Supplier Device Package	Data Interface	Sampling Rate (Per Second)	Features	Ratio - S/H:ADC	Number of A/D Converters	Reference Type
Texas Instruments THS10064CDAG4	S/H-MUX-ADC	70 °C	0 °C	5 V	Pipelined	Surface Mount	32-TSSOP	10	Differential Single Ended	5.25 V	3 V	2 4	32-TSSOP	Parallel	6 M	Simultaneous Sampling	4:1	1	External Internal
Texas Instruments THS10064CDA	S/H-MUX-ADC	70 °C	0 °C	5 V	Pipelined	Surface Mount	32-TSSOP	10	Differential Single Ended	5.25 V	3 V	2 4	32-TSSOP	Parallel	6 M	Simultaneous Sampling	4:1	1	External Internal
Texas Instruments THS10064IDA	S/H-MUX-ADC	85 °C	-40 °C	5 V	Pipelined	Surface Mount	32-TSSOP	10	Differential Single Ended	5.25 V	3 V	2 4	32-TSSOP	Parallel	6 M	Simultaneous Sampling	4:1	1	External Internal

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	92	$ 15.62
Texas Instruments	TUBE	1	$ 15.75
		100	$ 13.76
		250	$ 10.61
		1000	$ 9.49

Description

General part information

THS10064 Series

The THS10064 is a CMOS, low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to improve data transfers to the processor. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.

An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. Two different conversion modes can be selected. In single conversion mode, a single and simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal (CONVST)\. The conversion clock in single conversion mode is generated internally using a clock oscillator circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the THS10064. The internal clock oscillator is switched off in continuous conversion mode.

The THS10064C is characterized for operation from 0°C to 70°C, and the THS10064I is characterized for operation from –40°C to 85°C.

Documents

Technical documentation and resources

THS10064: 10-Bit, 4 Analog Input, 6 MSPS, Simultaneous Sampling A-to-D Converter datasheet (Rev. B)

Data sheet