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32-TQFP-PJT
Integrated Circuits (ICs)

DDC112YK/250

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Texas Instruments

DUAL CURRENT INPUT 20-BIT ANALOG-TO-DIGITAL CONVERTER

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32-TQFP-PJT
Integrated Circuits (ICs)

DDC112YK/250

Active
Texas Instruments

DUAL CURRENT INPUT 20-BIT ANALOG-TO-DIGITAL CONVERTER

Technical Specifications

Parameters and characteristics for this part

SpecificationDDC112YK/250
ArchitectureSigma-Delta
ConfigurationDSI-ADC
Data InterfaceSPI
FeaturesSimultaneous Sampling
Input TypeSingle Ended
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits20
Number of Inputs2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case32-TQFP
Ratio - S/H:ADC
Reference TypeExternal
Supplier Device Package32-TQFP (7x7)
Voltage - Supply, Analog5 V
Voltage - Supply, Digital5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 27.74
10$ 25.58
25$ 24.43
100$ 21.85
Digi-Reel® 1$ 27.74
10$ 25.58
25$ 24.43
100$ 21.85
Tape & Reel (TR) 250$ 20.84
500$ 19.83
Texas InstrumentsSMALL T&R 1$ 23.62
100$ 20.63
250$ 15.91
1000$ 14.23

Description

General part information

DDC112 Series

The DDC112 is a dual input, wide dynamic range, charge-digitizing analog-to-digital (A/D) converter with 20-bit resolution. Low-level current output devices, such as photosensors, can be directly connected to its inputs. Charge integration is continuous as each input uses two integrators; while one is being digitized, the other is integrating.

For each of its two inputs, the DDC112 combines current-to-voltage conversion, continuous integration, programmable full-scale range, A/D conversion, and digital filtering to achieve a precision, wide dynamic range digital result. In addition to the internal programmable full-scale ranges, external integrating capacitors allow an additional user-settable full-scale range of up to 1000pC.

To provide single-supply operation, the internal A/D converter utilizes a differential input, with the positive input tied to VREF. When the integration capacitor is reset at the beginning of each integration cycle, the capacitor charges to VREF. This charge is removed in proportion to the input current. At the end of the integration cycle, the remaining voltage is compared to VREF.