MAX9381ESA+T
ActiveLOWEST POWER 3.0GHZ ECL/PECL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP
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MAX9381ESA+T
ActiveLOWEST POWER 3.0GHZ ECL/PECL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP
Technical Specifications
Parameters and characteristics for this part
| Specification | MAX9381ESA+T |
|---|---|
| Clock Frequency | 3 GHz |
| Function | Standard |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 C |
| Operating Temperature [Min] | -40 ¯C |
| Output Type | Complementary |
| Package / Case | 0.154 in |
| Package / Case | 8-SOIC |
| Package / Case | 3.9 mm |
| Supplier Device Package | 8-SOIC |
| Trigger Type | Negative Edge |
| Type | D-Type |
| Voltage - Supply [Max] | -5.5 V |
| Voltage - Supply [Min] | -2.25 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 8.46 | |
| Tape & Reel (TR) | 2500 | $ 7.96 | ||
Description
General part information
MAX9381 Series
The MAX9381 differential data, differential clock D flip-flop is pin compatible with the ON Semiconductor MC100EP52, with the added benefit of a wider supply-voltage range from 2.25V to 5.5V and 25% lower supply current. Data enters the master part of the flip-flop when the clock is low and is transferred to the outputs upon a positive transition of the clock. Interchanging the clock inputs allows the part to be used as a negative edge-triggered device. The MAX9381 utilizes input clamping circuits that ensure the stability of the outputs when the inputs are left open or at VEE.The MAX9381 is offered in an 8-pin SO package and the smaller 8-pin µMAX package.ApplicationsAutomated Test Equipment (ATE)Central Office Telecom EquipmentDLCsDSLAMPrecision Clock and Data DistributionWireless Base Stations
Documents
Technical documentation and resources
