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32-EDIP
Integrated Circuits (ICs)

DS1746-70IND+

Active
Analog Devices Inc./Maxim Integrated

RTC, DAY/DATE/MONTH/YEAR/CENTURY, HH:MM:SS, RTC, BYTEWIDE, 4.5 V TO 5.5 V SUPPLY, EDIP-32

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32-EDIP
Integrated Circuits (ICs)

DS1746-70IND+

Active
Analog Devices Inc./Maxim Integrated

RTC, DAY/DATE/MONTH/YEAR/CENTURY, HH:MM:SS, RTC, BYTEWIDE, 4.5 V TO 5.5 V SUPPLY, EDIP-32

Technical Specifications

Parameters and characteristics for this part

SpecificationDS1746-70IND+
Current - Timekeeping (Max)4 mA
Date FormatYY-MM-DD-dd
FeaturesY2K, Leap Year, NVSRAM
InterfaceParallel
Memory Size1 Mbit
Mounting TypeThrough Hole
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
Package / Case32-DIP Module
Package / Case15.24 mm
Package / Case0.6 in
Supplier Device Package32-EDIP
Time FormatHH:MM:SS (24 hr)
TypeClock/Calendar
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTube 1$ 67.95<4d
11$ 55.95
33$ 52.63
110$ 49.99
NewarkEach 1$ 52.091m+
5$ 45.54
10$ 38.98
33$ 38.71

Description

General part information

DS1746 Series

The DS1746 is a full-function, year-2000-compliant (Y2KC), real-time clock/calendar (RTC) and 128k x 8 nonvolatile static RAM. User access to all registers within the DS1746 is accomplished with a byte-wide interface as shown in Figure 1. The RTC information and control bits reside in the eight uppermost RAM locations. The RTC registers contain century, year, month, date, day, hours, minutes, and seconds data in 24-hour binary-coded decimal (BCD) format. Corrections for the date of each month and leap year are made automatically. The RTC clock registers are double buffered to avoid access of incorrect data that can occur during clock update cycles. The double-buffered system also prevents time loss as the timekeeping countdown continues unabated by access to time register data. The DS1746 also contains its own power-fail circuitry, which deselects the device when the VCCsupply is in an out of tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by low VCCas errant access and update cycles are avoided.