Specification	SN74AS109AN

Clock Frequency	105 MHz
Current - Output High, Low [custom]	20 mA
Current - Output High, Low [custom]	2 mA
Function	Reset, Set(Preset)
Max Propagation Delay @ V, Max CL	9 ns
Mounting Type	Through Hole
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Output Type	Complementary
Package / Case	0.3 in
Package / Case	16-DIP
Package / Case	7.62 mm
Supplier Device Package	16-PDIP
Trigger Type	Positive Edge
Type	JK Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AS109A Series

Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset

Part	Package / Case	Package / Case	Package / Case	Number of Bits per Element	Trigger Type	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Function	Voltage - Supply [Min]	Voltage - Supply [Max]	Max Propagation Delay @ V, Max CL	Clock Frequency	Output Type	Mounting Type	Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Elements	Package / Case [x]	Package / Case [y]
Texas Instruments SN74AS109ANSR	0.209 "	16-SOIC	5.3 mm	1	Positive Edge	70 °C	0 °C	16-SO	Reset Set(Preset)	4.5 V	5.5 V	9 ns	105 MHz	Complementary	Surface Mount	JK Type	20 mA	2 mA	2
Texas Instruments SN74AS109ANS	0.209 "	16-SOIC	5.3 mm	1	Positive Edge	70 °C	0 °C	16-SO	Reset Set(Preset)	4.5 V	5.5 V	9 ns	105 MHz	Complementary	Surface Mount	JK Type	20 mA	2 mA	2
Texas Instruments SN74AS109N
Texas Instruments SN74AS109ADR		16-SOIC		1	Positive Edge	70 °C	0 °C	16-SOIC	Reset Set(Preset)	4.5 V	5.5 V	9 ns	105 MHz	Complementary	Surface Mount	JK Type	20 mA	2 mA	2	0.154 in	3.9 mm
Texas Instruments SN74AS109AN	0.3 in	16-DIP	7.62 mm	1	Positive Edge	70 °C	0 °C	16-PDIP	Reset Set(Preset)	4.5 V	5.5 V	9 ns	105 MHz	Complementary	Through Hole	JK Type	20 mA	2 mA	2

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	350	$ 2.77
Texas Instruments	TUBE	1	$ 3.45
		100	$ 3.02
		250	$ 2.12
		1000	$ 1.71

Description

General part information

SN74AS109A Series

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the J and K\ inputs meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the J and K\ inputs can be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

The SN54ALS109A and SN54AS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS109A and SN74AS109A are characterized for operation from 0°C to 70°C.

Documents

Technical documentation and resources

Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset datasheet (Rev. B)

Data sheet