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Texas Instruments-DIT4096IPWR Transceivers Misc Digital Audio Transmitter 1TX 28-Pin TSSOP T/R
Integrated Circuits (ICs)

DS90LV110ATMT/NOPB

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Texas Instruments

1 TO 10 LVDS DATA/CLOCK DISTRIBUTOR WITH FAILSAFE

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Texas Instruments-DIT4096IPWR Transceivers Misc Digital Audio Transmitter 1TX 28-Pin TSSOP T/R
Integrated Circuits (ICs)

DS90LV110ATMT/NOPB

Active
Texas Instruments

1 TO 10 LVDS DATA/CLOCK DISTRIBUTOR WITH FAILSAFE

Technical Specifications

Parameters and characteristics for this part

SpecificationDS90LV110ATMT/NOPB
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]200 MHz
InputLVPECL, LVDS, PECL
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case28-TSSOP
Package / Case0.173 in
Package / Case [y]4.4 mm
Ratio - Input:Output [custom]1:10
Supplier Device Package28-TSSOP
TypeFanout Buffer (Distribution)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 9.16
10$ 8.27
48$ 7.89
144$ 6.85
288$ 6.54
528$ 5.96
1008$ 5.19
Texas InstrumentsTUBE 1$ 7.12
100$ 5.80
250$ 4.56
1000$ 3.87

Description

General part information

DS90LV110AT Series

DS90LV110A is a 1 to 10 data/clock distributor utilizing LVDS (Low Voltage Differential Signaling) technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion. The design allows connection of 1 input to all 10 outputs. LVDS I/O enable high speed data transmission for point-to-point interconnects. This device can be used as a high speed differential 1 to 10 signal distribution / fanout replacing multi-drop bus applications for higher speed links with improved signal quality. It can also be used for clock distribution up to 200MHz.

The DS90LV110A accepts LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.

The LVDS outputs can be put into TRI-STATE by use of the enable pin.