
KAD5512HP-25Q72
Active12-BIT, 250MSPS SINGLE-CHANNEL ADC WITH LVDS/LVCMOS OUTPUTS
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KAD5512HP-25Q72
Active12-BIT, 250MSPS SINGLE-CHANNEL ADC WITH LVDS/LVCMOS OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | KAD5512HP-25Q72 |
|---|---|
| Architecture | SAR |
| Configuration | S/H-ADC |
| Data Interface | LVDS - Parallel, Parallel |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 12 bits |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 72-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 250 M |
| Supplier Device Package | 72-QFN (10x10) |
| Voltage - Supply, Analog [Max] | 1.9 V |
| Voltage - Supply, Analog [Min] | 1.7 V |
| Voltage - Supply, Digital [Max] | 1.9 V |
| Voltage - Supply, Digital [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 32 | $ 104.25 | |
Description
General part information
KAD5512HP-25 Series
The KAD5512P-50 is a low-power, high performance, 12-bit, 500MSPS analog-to-digital converter designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. The KAD5512P-50 is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS. The device utilizes two time-interleaved 12-bit, 250MSPS A/D cores to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of matching characteristics (gain, offset, skew) between the two converter cores. These adjustments allow the user to minimize spurs associated with the interleaving process. Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512P-50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified across the full industrial temperature range (-40°C to +85°C).
Documents
Technical documentation and resources