Specification	SN74LVCE161284DGGR

Logic Type	IEEE STD 1284 Translation Transceiver
Mounting Type	Surface Mount
Number of Bits	19
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	48-TFSOP
Package / Case	0.24 in
Package / Case [custom]	6.1 mm
Supplier Device Package	48-TSSOP
Supply Voltage [Max]	3.6 V
Supply Voltage [Min]	3 V

SN74LVCE161284 Series

19-Bit IEEE 1284 Translation Transceiver with Error-Free Power Up

Part	Package / Case [y]	Package / Case	Package / Case [y]	Supply Voltage [Min]	Supply Voltage [Max]	Mounting Type	Number of Bits	Supplier Device Package	Logic Type	Operating Temperature [Max]	Package / Case	Package / Case [custom]
Texas Instruments 74LVCE161284DLRG4	0.295 in	48-BSSOP	7.5 mm	3 V	3.6 V	Surface Mount	19	48-SSOP	IEEE STD 1284 Translation Transceiver	70 °C
Texas Instruments SN74LVCE161284DL	0.295 in	48-BSSOP	7.5 mm	3 V	3.6 V	Surface Mount	19	48-SSOP	IEEE STD 1284 Translation Transceiver	70 °C
Texas Instruments SN74LVCE161284DLR	0.295 in	48-BSSOP	7.5 mm	3 V	3.6 V	Surface Mount	19	48-SSOP	IEEE STD 1284 Translation Transceiver	70 °C
Texas Instruments SN74LVCE161284VR		48-TFSOP		3 V	3.6 V	Surface Mount	19		IEEE STD 1284 Translation Transceiver	70 °C	0.173 in 4.4 mm
Texas Instruments SN74LVCE161284DGGR		48-TFSOP		3 V	3.6 V	Surface Mount	19	48-TSSOP	IEEE STD 1284 Translation Transceiver	70 °C	0.24 in	6.1 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.91
		10	$ 2.61
		25	$ 2.47
		100	$ 2.14
		250	$ 2.03
		500	$ 1.82
		1000	$ 1.54
	Digi-Reel®	1	$ 2.91
		10	$ 2.61
		25	$ 2.47
		100	$ 2.14
		250	$ 2.03
		500	$ 1.82
		1000	$ 1.54
	Tape & Reel (TR)	2000	$ 1.46
		6000	$ 1.41
Texas Instruments	LARGE T&R	1	$ 2.20
		100	$ 1.92
		250	$ 1.35
		1000	$ 1.09

Description

General part information

SN74LVCE161284 Series

The SN74LVCE161284 is designed for 3-V to 3.6-V VCCoperation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input (DIR) is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side, and four receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interface specifications. Except for HOST LOGIC IN and peripheral logic out (PERI LOGIC OUT), all cable-side pins have a 1.4-kintegrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above VCCCABLE. If VCCCABLE is off, PERI LOGIC OUT is set to low.

Documents

Technical documentation and resources

SN74LVCE161284DGGR

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SN74LVCE161284DGGR

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Technical Specifications

SN74LVCE161284 Series

Pricing

Description

SN74LVCE161284 Series

Documents

Datasheet

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Design Summary for WCSP Little Logic (Rev. B)

Little Logic Guide 2018 (Rev. G)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Voltage Translation Buying Guide (Rev. A)

How to Select Little Logic (Rev. A)

Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Texas Instruments Little Logic Application Report

Input and Output Characteristics of Digital Integrated Circuits

Low-Voltage Logic (LVC) Designer's Guide

Standard Linear & Logic for PCs, Servers & Motherboards

Selecting the Right Level Translation Solution (Rev. A)

Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)

CMOS Power Consumption and CPD Calculation (Rev. B)

Understanding Advanced Bus-Interface Products Design Guide

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

LVC Characterization Information

TI IBIS File Creation, Validation, and Distribution Processes

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LOGIC Pocket Data Book (Rev. B)

Signal Switch Data Book (Rev. A)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Live Insertion

Logic Guide (Rev. AB)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators

SN74LVCE161284 Series