
AD9445BSVZ-125
Active14-BIT, 105 MSPS / 125 MSPS A/D CONVERTER
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AD9445BSVZ-125
Active14-BIT, 105 MSPS / 125 MSPS A/D CONVERTER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | AD9445BSVZ-125 |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | LVDS - Parallel |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 14 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 100-TQFP Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External, Internal |
| Sampling Rate (Per Second) | 125 M |
| Voltage - Supply, Digital [Max] | 3.6 V |
| Voltage - Supply, Digital [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 127.73 | |
| 10 | $ 104.19 | |||
| 25 | $ 99.12 | |||
Description
General part information
AD9445 Series
The AD9445 is a 14-bit monolithic, sampling analog-to-digital converter (ADC) with an on-chip, IF sampling track-and-hold circuit and is optimized for power, small size, and ease of use. The product operates at up to an 105 MSPS conversion rate and is optimized for multi-carrier, multimode receivers, such as those found in cellular infrastructure equipment.The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are LVDS-compatible (ANSI-644) or CMOS-compatible and include the means to reduce the overall current needed for short trace distances.Optional features allow users to implement various selectable operating conditions, including data format select and output data mode.The AD9445 is available in a 100-lead surface-mount plastic package (100-lead TQFP/EP) specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTSHigh performance: Outstanding SFDR performance for multicarrier, multimode 3G and 4G cellular base station receivers.Ease of use: On-chip reference and track-and-hold. An output clock simplifies data capture.Packaged in a Pb-free, 100-lead TQFP/EP.Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths.OR (out-of-range) outputs indicate when the signal is beyond the selected input range.APPLICATIONSMulti-carrier, multimode cellular receiversAntenna array positioningPower amplifier linearizationBroadband wirelessRadar, infrared imagingMedical ImagingCommunications instrumentation
Documents
Technical documentation and resources