
DRV83053PHP
Active45-V MAX 3-PHASE SMART GATE DRIVER WITH CURRENT SHUNT AMPLIFIERS & SPI
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DRV83053PHP
Active45-V MAX 3-PHASE SMART GATE DRIVER WITH CURRENT SHUNT AMPLIFIERS & SPI
Technical Specifications
Parameters and characteristics for this part
| Specification | DRV83053PHP |
|---|---|
| Applications | Three-Phase BLDC, PMSM Motors |
| Function | Controller - Commutation, Direction Management |
| Interface | SPI, PWM |
| Motor Type - Stepper | Multiphase |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Configuration | Pre-Driver - Half Bridge (3) |
| Package / Case | 48-PowerTQFP |
| Supplier Device Package | 48-HTQFP (7x7) |
| Technology | Power MOSFET |
| Voltage - Supply [Max] | 45 V |
| Voltage - Supply [Min] | 4.4 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 6.53 | |
| 10 | $ 5.86 | |||
| 25 | $ 5.54 | |||
| 80 | $ 4.80 | |||
| 250 | $ 4.56 | |||
| 500 | $ 4.09 | |||
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 4.49 | |
| 100 | $ 3.66 | |||
| 250 | $ 2.87 | |||
| 1000 | $ 2.44 | |||
Description
General part information
DRV8305-Q1 Series
The DRV8305-Q1 device is a gate driver IC for three-phase motor-drive applications. The device provides three high-accuracy half-bridge drivers, each capable of driving a high-side and low-side N-channel MOSFET. A charge pump driver supports 100% duty cycle and low-voltage operation for cold crank situations. The device can tolerate load dump voltages up to 45-V.
The DRV8305-Q1 device includes three bidirectional current-shunt amplifiers for accurate low-side current measurements that support variable gain settings and an adjustable offset reference.
The DRV8305-Q1 device has an integrated voltage regulator to support an MCU or other system power requirements. The voltage regulator can be interfaced directly with a LIN physical interface to allow low-system standby and sleep currents.
Documents
Technical documentation and resources