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48-TQFP-PHP
Integrated Circuits (ICs)

DRV8305NEPHPRQ1

Active
Texas Instruments

AUTOMOTIVE 12-V BATTERY 3-PHASE SMART GATE DRIVER (GRADE 0 & GRADE 1)

48-TQFP-PHP
Integrated Circuits (ICs)

DRV8305NEPHPRQ1

Active
Texas Instruments

AUTOMOTIVE 12-V BATTERY 3-PHASE SMART GATE DRIVER (GRADE 0 & GRADE 1)

Technical Specifications

Parameters and characteristics for this part

SpecificationDRV8305NEPHPRQ1
ApplicationsThree-Phase BLDC, PMSM Motors
FunctionController - Commutation, Direction Management
GradeAutomotive
InterfaceSPI, PWM
Motor Type - StepperMultiphase
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output ConfigurationPre-Driver - Half Bridge (3)
Package / Case48-PowerTQFP
QualificationAEC-Q100
Supplier Device Package48-HTQFP (7x7)
TechnologyPower MOSFET
Voltage - Supply [Max]45 V
Voltage - Supply [Min]4.4 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 7.12
10$ 6.43
25$ 6.13
100$ 5.32
250$ 5.08
500$ 4.64
Digi-Reel® 1$ 7.12
10$ 6.43
25$ 6.13
100$ 5.32
250$ 5.08
500$ 4.64
Tape & Reel (TR) 1000$ 4.04
2000$ 3.89
Texas InstrumentsLARGE T&R 1$ 4.96
100$ 4.04
250$ 3.18
1000$ 2.69

Description

General part information

DRV8305-Q1 Series

The DRV8305-Q1 device is a gate driver IC for three-phase motor-drive applications. The device provides three high-accuracy half-bridge drivers, each capable of driving a high-side and low-side N-channel MOSFET. A charge pump driver supports 100% duty cycle and low-voltage operation for cold crank situations. The device can tolerate load dump voltages up to 45-V.

The DRV8305-Q1 device includes three bidirectional current-shunt amplifiers for accurate low-side current measurements that support variable gain settings and an adjustable offset reference.

The DRV8305-Q1 device has an integrated voltage regulator to support an MCU or other system power requirements. The voltage regulator can be interfaced directly with a LIN physical interface to allow low-system standby and sleep currents.