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SN74LVC16374ADLR

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Texas Instruments

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SSOP (DL)
Integrated Circuits (ICs)

SN74LVC16374ADLR

Active
Texas Instruments

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC16374ADLR
Clock Frequency150 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)20 çA
FunctionStandard
Input Capacitance5 pF
Max Propagation Delay @ V, Max CL4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case48-BSSOP
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package48-SSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.49
10$ 1.34
25$ 1.27
100$ 1.08
250$ 1.01
500$ 0.89
Digi-Reel® 1$ 1.49
10$ 1.34
25$ 1.27
100$ 1.08
250$ 1.01
500$ 0.89
Tape & Reel (TR) 1000$ 0.79
2000$ 0.74
3000$ 0.71
5000$ 0.68
7000$ 0.66
10000$ 0.65
Texas InstrumentsLARGE T&R 1$ 1.24
100$ 0.95
250$ 0.70
1000$ 0.50

Description

General part information

SN74LVC16374A Series

This 16-bit edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation.

The SN74LVC16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources

TI IBIS File Creation, Validation, and Distribution Processes

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Logic Guide (Rev. AB)

Selection guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Live Insertion

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

How to Select Little Logic (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Signal Switch Data Book (Rev. A)

User guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Texas Instruments Little Logic Application Report

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Selecting the Right Level Translation Solution (Rev. A)

Application note

SN74LVC16374A 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs datasheet (Rev. B)

Data sheet

LVC Characterization Information

Application note