ADS54J54IRGCT
Active4-CHANNEL QUAD ADC PIPELINED 500MSPS 14-BIT JESD204B 64-PIN VQFN EP T/R
Deep-Dive with AI
Search across all available documentation for this part.
ADS54J54IRGCT
Active4-CHANNEL QUAD ADC PIPELINED 500MSPS 14-BIT JESD204B 64-PIN VQFN EP T/R
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS54J54IRGCT |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | JESD204B |
| Features | Simultaneous Sampling |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 4 |
| Number of Bits | 14 |
| Number of Inputs | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 64-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External |
| Sampling Rate (Per Second) | 500 M |
| Supplier Device Package | 64-VQFN (9x9) |
| Voltage - Supply, Analog [Max] | 3.45 V, 2 V |
| Voltage - Supply, Analog [Min] | 3.15 V, 1.8 V |
| Voltage - Supply, Digital [Max] | 1.9 V |
| Voltage - Supply, Digital [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 250 | $ 480.00 | |
| Texas Instruments | SMALL T&R | 1 | $ 447.76 | |
| 100 | $ 405.30 | |||
| 250 | $ 393.72 | |||
| 1000 | $ 386.00 | |||
Description
General part information
ADS54J54 Series
The ADS54J54 is a low power, wide bandwidth 14-bit 500 MSPS quad channel analog-to-digital converter (ADC). It supports the JESD204B serial interface with data rates up to 5 Gbps supporting 1 or 2 lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS54J54 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. Optional 2x Decimation Filter provides high-pass or low-pass filter modes.
The ADS54J54 is a low power, wide bandwidth 14-bit 500 MSPS quad channel analog-to-digital converter (ADC). It supports the JESD204B serial interface with data rates up to 5 Gbps supporting 1 or 2 lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS54J54 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. Optional 2x Decimation Filter provides high-pass or low-pass filter modes.
Documents
Technical documentation and resources