Specification	SN74LVTH2245DW

Current - Output High, Low	32 mA, 64 mA, 12 mA
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.7 V

SN74LVTH2245 Series

3.3-V ABT Octal Bus Transceivers With 3-State Outputs

Part	Number of Bits per Element	Package / Case	Package / Case [y]	Package / Case [y]	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Current - Output High, Low	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Supplier Device Package	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74LVTH2245DGVR	8	20-TFSOP	4.4 mm	0.173 in	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-TVSOP
Texas Instruments SN74LVTH2245DBR	8	20-SSOP			2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-SSOP
Texas Instruments SN74LVTH2245PWR	8	20-TSSOP		4.4 mm	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-TSSOP	0.173 in
Texas Instruments SN74LVTH2245PW	8	20-TSSOP		4.4 mm	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-TSSOP	0.173 in
Texas Instruments SN74LVTH2245NSR	8	20-SOIC			2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-SO		0.209 "	5.3 mm
Texas Instruments SN74LVTH2245NSRE4	8	20-SOIC			2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-SO		0.209 "	5.3 mm
Texas Instruments SN74LVTH2245PWRG4	8	20-TSSOP		4.4 mm	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-TSSOP	0.173 in
Texas Instruments SN74LVTH2245DWR	8	20-SOIC	7.5 mm	0.295 in	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-SOIC
Texas Instruments SN74LVTH2245DW	8	20-SOIC	7.5 mm	0.295 in	2.7 V	3.6 V	3-State	12 mA 32 mA 64 mA	Surface Mount	85 °C	-40 °C	1	20-SOIC

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.04
		10	$ 0.93
		25	$ 0.88
		100	$ 0.72
		250	$ 0.68
		500	$ 0.60
		1000	$ 0.47
		2500	$ 0.44
		5000	$ 0.42
Texas Instruments	TUBE	1	$ 0.77
		100	$ 0.59
		250	$ 0.43
		1000	$ 0.31

Description

General part information

SN74LVTH2245 Series

These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the devices so the buses are effectively isolated.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Documents

Technical documentation and resources

Logic Guide (Rev. AB)

Selection guide

LOGIC Pocket Data Book (Rev. B)

User guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

SN74LVTH2245DW

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SN74LVTH2245DW

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Technical Specifications

SN74LVTH2245 Series

Pricing

Description

SN74LVTH2245 Series

Documents

Logic Guide (Rev. AB)

LOGIC Pocket Data Book (Rev. B)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Implications of Slow or Floating CMOS Inputs (Rev. E)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN54LVTH2245, SN74LVTH2245 datasheet (Rev. E)

Live Insertion

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

LVT Family Characteristics (Rev. A)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

Understanding Advanced Bus-Interface Products Design Guide

LVT-to-LVTH Conversion

Advanced Bus Interface Logic Selection Guide

SN74LVTH2245 Series