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Texas Instruments-SN74LV373ADGVRG4 Latches Latch Transparent 3-ST 8-CH D-Type 20-Pin TVSOP T/R
Integrated Circuits (ICs)

SN74LVTH2245DGVR

Active
Texas Instruments

3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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Texas Instruments-SN74LV373ADGVRG4 Latches Latch Transparent 3-ST 8-CH D-Type 20-Pin TVSOP T/R
Integrated Circuits (ICs)

SN74LVTH2245DGVR

Active
Texas Instruments

3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH2245DGVR
Current - Output High, Low32 mA, 64 mA, 12 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case20-TFSOP
Package / Case [y]4.4 mm
Package / Case [y]0.173 in
Supplier Device Package20-TVSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.38
10$ 0.87
25$ 0.73
100$ 0.58
250$ 0.50
500$ 0.46
1000$ 0.42
Digi-Reel® 1$ 1.38
10$ 0.87
25$ 0.73
100$ 0.58
250$ 0.50
500$ 0.46
1000$ 0.42
Tape & Reel (TR) 2000$ 0.39
4000$ 0.36
6000$ 0.35
10000$ 0.33
14000$ 0.32
20000$ 0.32
Texas InstrumentsLARGE T&R 1$ 0.59
100$ 0.45
250$ 0.33
1000$ 0.24

Description

General part information

SN74LVTH2245 Series

These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the devices so the buses are effectively isolated.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.