
Deep-Dive with AI
Search across all available documentation for this part.

Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SY100EP195VTG-TR |
|---|---|
| Available Total Delay (Max) | 12.2 ns |
| Available Total Delay (Min) | 2.05 ns |
| Delay to 1st Tap | 2.05 ns |
| Function | Programmable |
| Mounting Type | Surface Mount |
| Number of Independent Delays | 1 |
| Number of Taps/Steps | 1024 |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 32-TQFP |
| Package Length | 7 mm |
| Package Name | 32-TQFP |
| Package Width | 7 mm |
| Tap Increment | 10 ps |
| Voltage - Supply (Maximum) | 5.5 V |
| Voltage - Supply (Minimum) | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 9.78 | <1d |
| 25 | $ 8.15 | |||
| 100 | $ 7.88 | |||
| Tape & Reel (TR) | 1000 | $ 7.88 | <1d | |
| Microchip Direct | T/R | 1 | $ 9.78 | 1m+ |
| 25 | $ 8.15 | |||
| 100 | $ 7.41 | |||
| 1000 | $ 7.16 | |||
| 5000 | $ 7.08 | |||
| 10000 | $ 7.00 | |||
CAD
3D models and CAD resources for this part
Description
General part information
SY100EP15V Series
The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended PECL/ECL source (CLK1) and a differential PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP PECL/ECL logic compatible.
AC performance is guaranteed over the industrial –40°C to +85°C temperature range and 3.3V to 5V supply voltage. This device will operate in PECL/LVPECL or ECL/LVECL mode. For clock applications, the high-speed design combined with an extremely fast rise/fall time of less than 225ps produces a toggle frequency as high as 2.5GHz (~400mVPP swing).A VBB output reference pin is available for AC–coupled and single-ended input applications. In addition, a synchronous output enable function is provided.The SY100EP15V is part of Micrel’s high-speed, precision edge timing and distribution family.
For applications that require a different I/O combination, consult Micrel's website and choose from a comprehensive product line of high-speed, low-skew fanout buffers, translators, and clock dividers.
Documents
Technical documentation and resources