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225-PBGA (23x23)
Integrated Circuits (ICs)

ADSP-21060LABZ-160

Active
Analog Devices

SHARC, 120 MFLOPS, 3.3 V, FLOATING POINT

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225-PBGA (23x23)
Integrated Circuits (ICs)

ADSP-21060LABZ-160

Active
Analog Devices

SHARC, 120 MFLOPS, 3.3 V, FLOATING POINT

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-21060LABZ-160
Clock Rate40 MHz
InterfaceHost Interface, Serial Port, Link Port
Mounting TypeSurface Mount
Non-Volatile MemoryExternal
On-Chip RAM512 kB
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Supplier Device Package225-PBGA (23x23)
TypeFloating Point
Voltage - Core3.3 V
Voltage - I/O3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$

Description

General part information

ADSP-21060L Series

TheADSP-21062andADSP-21060SHARC DSPs are signal processing microcomputers that offer new capabilities and levels of performance. The ADSP-2106x SHARCs are 32-bit processors optimized for high performance DSP applications. The ADSP-2106x builds on the ADSP-21000 DSP core to form a complete system-on-a-chip, adding a dual-ported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus.Fabricated in a high speed, low power CMOS process, the ADSP-2106x has a 25 ns instruction cycle time and operates at 40 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.The ADSP-2106x SHARC DSP represents a new standard of integration for signal computers, combining a high performance floating-point DSP core with integrated, on-chip system features including a 4 Mbit SRAM memory (2 Mbit on the ADSP-21062, 1 Mbit on the ADSP-21061), host processor interface, DMA controller, serial ports, and link port and parallel bus connectivity for glueless DSP multiprocessing.

Documents

Technical documentation and resources

EE-47: ADSP-2106x Link Ports - Maximum Throughput

Application Note

EE-62: Accessing Short Word Memory In C

Application Note

EE-74: Analog Devices Serial Port Development and Troubleshooting Guide

Application Note

EE-37: How to Interface an LCD to the 21xx and 2106x Family DSP's

Application Note

EE-109: ADSP2106x : Using 2106x SPORT's as Timers

Application Note

EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)

Application Note

EE-132: Placing C Code and Data Modules in SHARC memory using VisualDSP++™

Application Note

EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)

Application Note

EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)

Application Note

EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)

Application Note

EE-280: In-Circuit Flash Programming on ADSP-2106x SHARC® Processors (Rev.2)

Application Note

EE-103: Performing Level Conversion Between 5v and 3.3v IC's

Application Note

EE-332: Cycle Counting and Profiling (Rev.2)

Application Note

EE-110: A Quick Primer on ELF and DWARF File Formats

Application Note

EE-166: ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0

Application Note

EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)

Application Note

EE-85: Recommended Handling of Unused SHARC Pins

Application Note

EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)

Application Note

EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs

Application Note

EE-104: Setting Up Streams with the VisualDSP Debugger

Application Note

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC: SHARC Processor Data Sheet (Rev.H)

Data Sheet

EE-241: SHARC® DSPs to TigerSHARC® Processors Code Porting Guide (Rev.1)

Application Note

ADSP-21060/ADSP-21060L SHARC Anomaly List for Revisions 2.1, 3.0, 3.1 (Rev.A)

Integrated Circuit Anomaly

EE-42: C-Programs on the ADSP-2106x

Application Note

EE-70: ADSP-2106x SPORT DTx pins: Is There Potential MCM Data Contention Between Different SHARCs

Application Note

EE-86: Interfacing SHARC 2106x DSPs to PLX 9080 PCI Bridge Chips

Application Note

Apex-ICE USB Emulator Hardware Installation Guide (Rev.6.0)

Legacy Emulator Manual

EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)

Application Note

Summit-ICE PCI Emulator Hardware Installation Guide (Rev.4)

Legacy Emulator Manual

EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)

Application Note

EE-141: Benchmarking C Code on the ADSP-2106x and the ADSP-2116x Family of DSPs

Application Note

EE-45: Using the ADSP-2106x/21020 EZ-ICE DBWIN Utility

Application Note

EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)

Application Note

EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)

Application Note

EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)

Application Note

EE-46: SHARC Internal Power Measurements

Application Note

EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)

Application Note

ADSP-2106x SHARC®User's Manual (Rev.2.1)

Processor Manual

EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)

Application Note

EE-128: DSP in C++: Calling Assembly Class Member Functions From C++

Application Note

Package Drawing - 225-Ball PBGA (23mm x 20mm)

Package Drawing

EE-116: SHARC Shortword DMA

Application Note

An Almost Pure DDS Sine Wave Tone Generator

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