The 'GTL16612 devices are 18-bit UBT™ transceivers that provide LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. They combine D-type flip-flops and D-type latches to allow for transparent, latched, clocked, and clock-enabled modes of data transfer identical to the '16601 function. The devices provide an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing (<1 V), reduced input threshold levels, and OEC™ circuitry.

The user has the flexibility of using these devices at either GTL (VTT= 1.2 V and VREF= 0.8 V) or the preferred higher noise margin GTL+ (VTT= 1.5 V and VREF= 1 V) signal levels. GTL+ is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels and are 5-V tolerant. VREFis the reference input voltage for the B port.

VCC(5 V) supplies the internal and GTL circuitry while VCC(3.3 V) supplies the LVTTL output buffers.Read more