SN74LV8T596QPWRQ1
ActiveAUTOMOTIVE EIGHT-BIT VOLTAGE TRANSLATING SHIFT REGISTERS
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SN74LV8T596QPWRQ1
ActiveAUTOMOTIVE EIGHT-BIT VOLTAGE TRANSLATING SHIFT REGISTERS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV8T596QPWRQ1 |
|---|---|
| Function | Serial to Parallel, Serial |
| Grade | Automotive |
| Logic Type | Shift Register |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Open Drain |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Qualification | AEC-Q100 |
| Supplier Device Package | 16-TSSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 3000 | $ 0.45 | |
| 6000 | $ 0.43 | |||
| 15000 | $ 0.41 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.79 | |
| 100 | $ 0.61 | |||
| 250 | $ 0.45 | |||
| 1000 | $ 0.32 | |||
Description
General part information
SN74LV8T596-Q1 Series
The SN74LV8T596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high impedance state. The operation of the OE input does not impact the internal register data
The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The SN74LV8T596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high impedance state. The operation of the OE input does not impact the internal register data
Documents
Technical documentation and resources
