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TEXTISSN74LVC245AIPWREP
Integrated Circuits (ICs)

74VCX245MTCX

Active
ON Semiconductor

LOW VOLTAGE BIDIRECTIONAL TRANSCEIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

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TEXTISSN74LVC245AIPWREP
Integrated Circuits (ICs)

74VCX245MTCX

Active
ON Semiconductor

LOW VOLTAGE BIDIRECTIONAL TRANSCEIVER WITH 3.6V TOLERANT INPUTS AND OUTPUTS

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification74VCX245MTCX
Current - Output High, Low24 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case20-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Supplier Device Package20-TSSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.4 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBulk 817$ 0.37

Description

General part information

74VCX162244 Series

The 74VCX16373 is an advanced performance, non-inverting 16-bit transparent latch. It is designed for very high-speed, very low-power operation in 1.8V, 2.5V or 3.3V systems. The VCX16373 is byte controlled, with each byte functioning identically, but independently. Each byte has separate Output Enable and Latch Enable inputs. These control pins can be tied together for full 16-bit operation.When operating at 2.5V (or 1.8V) the part is designed to tolerate voltages it may encounter on either inputs or outputs when interfacing to 3.3V busses. It is guaranteed to be over-voltage tolerant to 3.6V.The 74VCX16373 contains 16 D-type latches with 3-state 3.6V-tolerant outputs. When the Latch Enable (LEn) inputs are HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, (a latch output will change state each time its D input changes). When LE is LOW, the latch stores the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The 3-state outputs are controlled by the Output Enable (OEn)bar inputs. When OEbar is LOW, the outputs are enabled. When OEbar is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches.

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