Specification	SN74HC00QDRG4Q1

Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Grade	Automotive
Input Logic Level - High [Max]	4.2 V
Input Logic Level - High [Min]	1.5 V
Input Logic Level - Low [Max]	1.8 V
Input Logic Level - Low [Min]	0.5 V
Logic Type	NAND Gate
Max Propagation Delay @ V, Max CL	15 ns
Mounting Type	Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Package / Case	14-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Qualification	AEC-Q100
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

SN74HC00-Q1 Series

Automotive, 4-ch, 2-input, 2-V to 6-V 5.2 mA drive strength NAND gate

Part	Logic Type	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Mounting Type	Number of Inputs	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Max Propagation Delay @ V, Max CL	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Number of Circuits	Package / Case [x]	Package / Case [y]	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Supplier Device Package	Grade	Qualification	Package / Case	Package / Case
Texas Instruments CD74HC00ME4	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.154 in	3.9 mm	14-SOIC	-55 °C	125 °C
Texas Instruments SN74HC00NSR	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.209 "	5.3 mm	14-SOIC	-40 °C	85 °C	14-SO
Texas Instruments SN74HC00QDRQ1	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.154 in	3.9 mm	14-SOIC	-40 °C	125 °C		Automotive	AEC-Q100
Texas Instruments SN74HC00ANSR	NAND Gate			Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	13 ns	1.9 V	5.9 V	4	0.209 "	5.3 mm	14-SOIC	-40 °C	85 °C	14-SO
Texas Instruments SN74HC00DBR	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4			14-SSOP	-40 °C	85 °C	14-SSOP			5.3 mm	0.209 "
Texas Instruments SN74HC00N	NAND Gate	1.8 V	0.5 V	Through Hole	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.3 "	7.62 mm	14-DIP	-40 °C	85 °C
Texas Instruments SN74HC00QDRG4Q1	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.154 in	3.9 mm	14-SOIC	-40 °C	125 °C		Automotive	AEC-Q100
Texas Instruments SN74HC00DE4	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.154 in	3.9 mm	14-SOIC	-40 °C	85 °C
Texas Instruments SN74HC00AN	NAND Gate			Through Hole	2	5.2 mA	5.2 mA	2 V	6 V	13 ns	1.9 V	5.9 V	4	0.3 "	7.62 mm	14-DIP	-40 °C	85 °C
Texas Instruments SN74HC00D	NAND Gate	1.8 V	0.5 V	Surface Mount	2	5.2 mA	5.2 mA	2 V	6 V	15 ns	1.5 V	4.2 V	4	0.154 in	3.9 mm	14-SOIC	-40 °C	85 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.56
		10	$ 0.40
		25	$ 0.35
		100	$ 0.31
		250	$ 0.29
		500	$ 0.27
		1000	$ 0.27
	Digi-Reel®	1	$ 0.56
		10	$ 0.40
		25	$ 0.35
		100	$ 0.31
		250	$ 0.29
		500	$ 0.27
		1000	$ 0.27
	Tape & Reel (TR)	2500	$ 0.20
		5000	$ 0.20
		7500	$ 0.19
		12500	$ 0.19
		17500	$ 0.19
		25000	$ 0.19
Texas Instruments	LARGE T&R	1	$ 0.40
		100	$ 0.27
		250	$ 0.21
		1000	$ 0.14

Description

General part information

SN74HC00-Q1 Series

This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y =A ● Bin positive logic.

Documents

Technical documentation and resources

SN74HC00QDRG4Q1

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SN74HC00QDRG4Q1

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Technical Specifications

SN74HC00-Q1 Series

Pricing

Description

SN74HC00-Q1 Series

Documents

Live Insertion

SN74HC00-Q1 Automotive Quadruple 2-Input NAND Gates datasheet (Rev. B)

LOGIC Pocket Data Book (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

Signal Switch Data Book (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Designing With Logic (Rev. C)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SN54/74HCT CMOS Logic Family Applications and Restrictions

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Logic Guide (Rev. AB)

SN74HC00-Q1 Series