Specification	SN74ALVCH16601DLR

Current - Output High, Low	24 mA
Mounting Type	Surface Mount
Number of Circuits	18 Bit
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	0.295 in
Package / Case	56-BSSOP
Package / Case	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVCH16601 Series

18-bit universal bus transceiver with 3-state outputs

Part	Current - Output High, Low	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Number of Circuits	Package / Case	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments SN74ALVCH16601DGGR	24 mA	Surface Mount	85 °C	-40 °C	56-TSSOP	18 Bit	6.1 mm	0.24 in	56-TFSOP	1.65 V	3.6 V
Texas Instruments SN74ALVCH16601DLR	24 mA	Surface Mount	85 °C	-40 °C	56-SSOP	18 Bit	7.5 mm	0.295 in	56-BSSOP	1.65 V	3.6 V
Texas Instruments SN74ALVCH16601DL	24 mA	Surface Mount	85 °C	-40 °C	56-SSOP	18 Bit	7.5 mm	0.295 in	56-BSSOP	1.65 V	3.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.71
	Digi-Reel®	1	$ 2.71
	Tape & Reel (TR)	1000	$ 1.33
		2000	$ 1.24
		5000	$ 1.19
Texas Instruments	LARGE T&R	1	$ 2.04
		100	$ 1.68
		250	$ 1.21
		1000	$ 0.91

Description

General part information

SN74ALVCH16601 Series

This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16601 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB\ and CLKENBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. Output enable OEAB\ is active low. When OEAB\ is low, the outputs are active. When OEAB\ is high, the outputs are in the high-impedance state.