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56-TSSOP
Integrated Circuits (ICs)

SN74ACT7803-15DLR

Obsolete
Texas Instruments

IC FIFO SYNC 512X18 12NS 56SSOP

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56-TSSOP
Integrated Circuits (ICs)

SN74ACT7803-15DLR

Obsolete
Texas Instruments

IC FIFO SYNC 512X18 12NS 56SSOP

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ACT7803-15DLR
Access Time12 ns
Bus DirectionalUni-Directional
Current - Supply (Max) [Max]400 µA
Data Rate67 MHz
Expansion TypeWidth
FunctionSynchronous
FWFT SupportFalse
Mounting TypeSurface Mount
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case0.295 in
Package / Case56-BSSOP
Package / Case7.5 mm
Programmable Flags SupportTrue
Retransmit CapabilityFalse
Supplier Device Package56-SSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

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Description

General part information

SN74ACT7803 Series

The SN74ACT7803 is a 512-word × 18-bit FIFO suited for buffering asynchronous datapaths up to

67-MHz clock rates and 12-ns access times. Two devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCCand GND pins, along with Texas Instruments patented output edge control (OECTM) circuit, dampen simultaneous switching noise.

The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident. Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2\ is low, and input ready (IR) is high. Data is read from memory on the rising edge of RDCLK when RDEN\, OE1\, and OE2\ are low and output ready (OR) is high. The first word written to memory is clocked through to the output buffer, regardless of the RDEN\, OE1\, and OE2\ levels. The OR flag indicates that valid data is present on the output buffer.

Documents

Technical documentation and resources