
Deep-Dive with AI
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Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ZL30157GGG2 |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Input | Clock |
| Main Purpose | Ethernet, SONET/SDH |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS, HCSL, LVPECL, LVDS |
| Package / Case | 100-LBGA |
| PLL | True |
| Ratio - Input:Output [custom] | 4:20 |
| Supplier Device Package | 100-FBGA (11x11) |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 47.69 | |
| 25 | $ 39.73 | |||
| 100 | $ 34.91 | |||
| Microchip Direct | TRAY | 1 | $ 47.69 | |
| 25 | $ 39.73 | |||
| 100 | $ 36.15 | |||
| 1000 | $ 33.40 | |||
| 5000 | $ 31.67 | |||
Description
General part information
ZL30157 Series
The ZL30157 Dual Channel Universal Clock Translator, part of Microsemi's ClockCenter platform of Synchronous Clock devices, delivers industry leading synchronization performance for high-speed complex applications. The highly integrated and programmable solution provides translation from any input reference frequency to any output clock frequency and allows designers to replace multiple components with a single chip, simplifying design and reducing component count and power.
The ZL30157 integrates 2 independent digital PLLs, accepts 4 input references and generates 12 programmable clock outputs. One precision synthesizers generates clocks with jitter performance that can directly drive 10 G PHY devices. One general purpose synthesizers generates a wide raneg of digital bus clocks.
Documents
Technical documentation and resources