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Technical Specifications
Parameters and characteristics for this part
| Specification | SN65DP141RLJR |
|---|---|
| Applications | Video Display |
| Control Interface | I2C, GPIO |
| Function | Redriver |
| Mounting Type | Surface Mount |
| Package / Case | 38-WFQFN Exposed Pad |
| Voltage - Supply [Max] | 3.46 V |
| Voltage - Supply [Min] | 2.37 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 7.78 | |
| 10 | $ 7.03 | |||
| 25 | $ 6.70 | |||
| 100 | $ 5.82 | |||
| 250 | $ 5.56 | |||
| 500 | $ 5.07 | |||
| 1000 | $ 4.42 | |||
| Digi-Reel® | 1 | $ 7.78 | ||
| 10 | $ 7.03 | |||
| 25 | $ 6.70 | |||
| 100 | $ 5.82 | |||
| 250 | $ 5.56 | |||
| 500 | $ 5.07 | |||
| 1000 | $ 4.42 | |||
| Tape & Reel (TR) | 3000 | $ 4.25 | ||
| Texas Instruments | LARGE T&R | 1 | $ 5.96 | |
| 100 | $ 4.86 | |||
| 250 | $ 3.82 | |||
| 1000 | $ 3.24 | |||
Description
General part information
SN65DP141 Series
The SN65DP141 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 12 Gbps and compensates for losses due to board traces and cables.
The device is transparent to DisplayPort (DP) link training such a way that a DP source and a sink can perform effective link training overcoming traditionalaux snoopingre-drivers’ shortcomings. Additionally, the device is position independent. It can be placed inside source, cable or sink effectively providing anegative losscomponent to the overall link budget. Linear equalization inside SN65DP141 also increases link margin when used with a receiver implementing Decision Feedback Equalization (DFE).
SN65DP141 allows independent channel control for equalization, gain, dynamic range using both I2C and GPIO configurations.
Documents
Technical documentation and resources