Catalog
12-Gbps DP 1.4/ eDP1.4 linear redriver
Key Features
• Supports VESA DisplayPort 1.4a, 2.0, and eDP 1.4Quad channel linear redriver supporting data rates up to 12 Gbps including DisplayPort RBR, HBR, HBR2, HBR3, and UHBR10Protocol agnosticTransparent to DP link trainingPosition independent on the link suitable for source, sink, and cable applications15-dB analog equalization at 6 GHzOutput linear dynamic range: 1200 mVBandwidth: >20 GHzBetter than 16-dB return loss at 6 GHz2.5-V or 3.3-V ±5% single power supply optionLow power consumption with 80 mW per channel at 2.5 V VCCGPIO or I2C controlSupports VESA DisplayPort 1.4a, 2.0, and eDP 1.4Quad channel linear redriver supporting data rates up to 12 Gbps including DisplayPort RBR, HBR, HBR2, HBR3, and UHBR10Protocol agnosticTransparent to DP link trainingPosition independent on the link suitable for source, sink, and cable applications15-dB analog equalization at 6 GHzOutput linear dynamic range: 1200 mVBandwidth: >20 GHzBetter than 16-dB return loss at 6 GHz2.5-V or 3.3-V ±5% single power supply optionLow power consumption with 80 mW per channel at 2.5 V VCCGPIO or I2C control
Description
AI
The SN65DP141 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 12 Gbps and compensates for losses due to board traces and cables.
The device is transparent to DisplayPort (DP) link training such a way that a DP source and a sink can perform effective link training overcoming traditionalaux snoopingre-drivers’ shortcomings. Additionally, the device is position independent. It can be placed inside source, cable or sink effectively providing anegative losscomponent to the overall link budget. Linear equalization inside SN65DP141 also increases link margin when used with a receiver implementing Decision Feedback Equalization (DFE).
SN65DP141 allows independent channel control for equalization, gain, dynamic range using both I2C and GPIO configurations.
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The SN65DP141 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 12 Gbps and compensates for losses due to board traces and cables.
The device is transparent to DisplayPort (DP) link training such a way that a DP source and a sink can perform effective link training overcoming traditionalaux snoopingre-drivers’ shortcomings. Additionally, the device is position independent. It can be placed inside source, cable or sink effectively providing anegative losscomponent to the overall link budget. Linear equalization inside SN65DP141 also increases link margin when used with a receiver implementing Decision Feedback Equalization (DFE).
SN65DP141 allows independent channel control for equalization, gain, dynamic range using both I2C and GPIO configurations.
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