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STMicroelectronics-L6981NDR DC to DC Converter and Switching Regulator Chip Conv DC-DC 3.5V to 38V Synchronous Step Down Single-Out 0.85V to 38V 1.5A 8-Pin SO N T/R
Integrated Circuits (ICs)

M24C16-DRMN3TP/K

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STMicroelectronics

EEPROM SERIAL-I2C 16K-BIT 2K X 8 1.8V/2.5V/3.3V/5V AUTOMOTIVE AEC-Q100 8-PIN SO N T/R

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STMicroelectronics-L6981NDR DC to DC Converter and Switching Regulator Chip Conv DC-DC 3.5V to 38V Synchronous Step Down Single-Out 0.85V to 38V 1.5A 8-Pin SO N T/R
Integrated Circuits (ICs)

M24C16-DRMN3TP/K

Active
STMicroelectronics

EEPROM SERIAL-I2C 16K-BIT 2K X 8 1.8V/2.5V/3.3V/5V AUTOMOTIVE AEC-Q100 8-PIN SO N T/R

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Technical Specifications

Parameters and characteristics for this part

SpecificationM24C16-DRMN3TP/K
Access Time450 ns
GradeAutomotive
Memory FormatEEPROM
Memory InterfaceI2C
Memory Organization2K x 8
Memory Size2 KB
Memory TypeNon-Volatile
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case0.154 in
Package / Case8-SOIC
Package / Case3.9 mm
QualificationAEC-Q100
Supplier Device Package8-SOIC
TechnologyEEPROM
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.7 V
Write Cycle Time - Word, Page4 ms

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 2500$ 0.28
DigikeyN/A 7474$ 0.42

Description

General part information

M24C16-A125 Series

The M24C16-A125 is a 16-Kbit serial EEPROM automotive grade device operating up to 125 °C. The M24C16-A125 is compliant with the very high level of reliability defined by the automotive standard AEC-Q100 grade 1.

The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.

The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C16-A125 is a byte-alterable memory (2048 × 8 bits) organized as 128 pages of 16 bytes in which the data integrity is significantly improved with an embedded error correction code logic.