
CD4076BMT
ActiveCMOS 4-BIT D-TYPE REGISTERS WITH CLOCK AND 3-STATE OUTPUTS
Deep-Dive with AI
Search across all available documentation for this part.

CD4076BMT
ActiveCMOS 4-BIT D-TYPE REGISTERS WITH CLOCK AND 3-STATE OUTPUTS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CD4076BMT |
|---|---|
| Clock Frequency | 16 MHz |
| Current - Output High, Low [custom] | 6.8 mA |
| Current - Output High, Low [custom] | 6.8 mA |
| Current - Quiescent (Iq) | 20 çA |
| Function | Reset |
| Input Capacitance | 5 pF |
| Max Propagation Delay @ V, Max CL | 180 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.61 | |
| 10 | $ 0.53 | |||
| 25 | $ 0.50 | |||
| 100 | $ 0.41 | |||
| Digi-Reel® | 1 | $ 0.61 | ||
| 10 | $ 0.53 | |||
| 25 | $ 0.50 | |||
| 100 | $ 0.41 | |||
| Tape & Reel (TR) | 250 | $ 0.38 | ||
| 500 | $ 0.32 | |||
| 1250 | $ 0.26 | |||
| 2500 | $ 0.23 | |||
| 6250 | $ 0.22 | |||
| 12500 | $ 0.21 | |||
| 25000 | $ 0.20 | |||
| Texas Instruments | SMALL T&R | 1 | $ 0.51 | |
| 100 | $ 0.34 | |||
| 250 | $ 0.27 | |||
| 1000 | $ 0.18 | |||
Description
General part information
CD4076B-MIL Series
CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the clock input. Output Disable inputs are also provided. When the Output Disable inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and present a high impedance.
The CD4076B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the clock input. Output Disable inputs are also provided. When the Output Disable inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and present a high impedance.
Documents
Technical documentation and resources