SN74LV541ATPWT
Obsolete8-CH, 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
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SN74LV541ATPWT
Obsolete8-CH, 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV541ATPWT |
|---|---|
| Current - Output High, Low [custom] | 16 mA |
| Current - Output High, Low [custom] | 16 mA |
| Logic Type | Buffer, Non-Inverting |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | 3-State |
| Package / Case | 20-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Supplier Device Package | 20-TSSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.93 | |
| 10 | $ 1.23 | |||
| 25 | $ 1.04 | |||
| 100 | $ 0.83 | |||
| Digi-Reel® | 1 | $ 1.93 | ||
| 10 | $ 1.23 | |||
| 25 | $ 1.04 | |||
| 100 | $ 0.83 | |||
| Tape & Reel (TR) | 250 | $ 0.73 | ||
| 500 | $ 0.67 | |||
| 750 | $ 0.64 | |||
| 1250 | $ 0.60 | |||
| 1750 | $ 0.58 | |||
| 2500 | $ 0.56 | |||
| 6250 | $ 0.52 | |||
| 12500 | $ 0.49 | |||
| Texas Instruments | SMALL T&R | 1 | $ 0.93 | |
| 100 | $ 0.72 | |||
| 250 | $ 0.53 | |||
| 1000 | $ 0.38 | |||
Description
General part information
SN74LV541AT Series
The SN74LV541AT is designed for 4.5-V to 5.5-V VCCoperation. The inputs are TTL-voltage compatible, which allows them to be interfaced with bipolar outputs and 3.3-V devices. The device also can be used to translate from 3.3 V to 5 V.
This device is ideal for driving bus lines or buffer memory address registers. It features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
The 3-state control gate is a two-input AND gate with active-low inputs so that, if either output-enable (OE1orOE2) input is high, all corresponding outputs are in the high-impedance state. The outputs provide noninverted data when they are not in the high-impedance state.
Documents
Technical documentation and resources
