Integrated Circuits (ICs)

MC74HC175AD

Obsolete

ON Semiconductor

IC FF D-TYPE SNGL 4BIT 16SOIC

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Integrated Circuits (ICs)

MC74HC175AD

Obsolete

ON Semiconductor

IC FF D-TYPE SNGL 4BIT 16SOIC

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DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	MC74HC175AD

Clock Frequency	35 MHz
Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Current - Quiescent (Iq)	4 çA
Input Capacitance	10 pF
Max Propagation Delay @ V, Max CL	22 ns
Mounting Type	Surface Mount
Number of Bits per Element	4
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Complementary
Package / Case	16-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Supplier Device Package	16-SOIC
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

MC74HC175A Series

Quad D Flip-Flop with Common Clock and Reset

Part	Number of Bits per Element	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Type	Clock Frequency	Number of Elements	Package / Case	Package / Case	Package / Case	Mounting Type	Output Type	Input Capacitance	Current - Quiescent (Iq)	Trigger Type	Max Propagation Delay @ V, Max CL	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case [y]	Operating Temperature [Max]	Operating Temperature [Min]
ON Semiconductor MC74HC175AFL1	4	16-SOEIAJ	5.2 mA	5.2 mA	D-Type	35 MHz	1	0.209 "	16-SOIC	5.3 mm	Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C
ON Semiconductor MC74HC175ADG	4	16-SOIC	5.2 mA	5.2 mA	D-Type	35 MHz	1		16-SOIC		Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C	0.154 in	3.9 mm
ON Semiconductor MM74HC175MTC	4	16-TSSOP	5.2 mA	5.2 mA	D-Type	70 MHz	1		16-TSSOP		Surface Mount	Complementary	5 pF	8 ÁA	Positive Edge	26 ns	2 V	6 V			0.173 in	4.4 mm	85 °C	-40 °C
ON Semiconductor MC74HC175AD	4	16-SOIC	5.2 mA	5.2 mA	D-Type	35 MHz	1		16-SOIC		Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C	0.154 in	3.9 mm
ON Semiconductor MC74HC175DTR2	4	16-TSSOP	5.2 mA	5.2 mA	D-Type	35 MHz	1		16-TSSOP		Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C	0.173 in	4.4 mm
ON Semiconductor MM74HC175SJX	4	16-SOP	5.2 mA	5.2 mA	D-Type	70 MHz	1	0.209 "	16-SOIC	5.3 mm	Surface Mount	Complementary	5 pF	8 ÁA	Positive Edge	26 ns	2 V	6 V					85 °C	-40 °C
ON Semiconductor MM74HC175SJ	4	16-SOP	5.2 mA	5.2 mA	D-Type	70 MHz	1	0.209 "	16-SOIC	5.3 mm	Surface Mount	Complementary	5 pF	8 ÁA	Positive Edge	26 ns	2 V	6 V					85 °C	-40 °C
ON Semiconductor MC74HC175AFR1	4	16-SOEIAJ	5.2 mA	5.2 mA	D-Type	35 MHz	1	0.209 "	16-SOIC	5.3 mm	Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C
ON Semiconductor MC74HC175FL2	4	16-SOEIAJ	5.2 mA	5.2 mA	D-Type	35 MHz	1	0.209 "	16-SOIC	5.3 mm	Surface Mount	Complementary	10 pF	4 çA	Positive Edge	22 ns	2 V	6 V	125 °C	-55 °C
ON Semiconductor MM74HC175MTCX	4	16-TSSOP	5.2 mA	5.2 mA	D-Type	70 MHz	1		16-TSSOP		Surface Mount	Complementary	5 pF	8 ÁA	Positive Edge	26 ns	2 V	6 V			0.173 in	4.4 mm	85 °C	-40 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

MC74HC175A Series

The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. Information at the D inputs of the MM74HC175 is transferred to the Q and Q# outputs on the positive going edge of the clock pulse. Both true and complement outputs from each flip flop are externally available. All four flip-flops are controlled by a common clock and a common CLEAR. Clearing is accomplished by a negative pulse at the CLEAR input. All four Q outputs are cleared to a logical "0" and all four Q# outputs to a logical "1." The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCCand ground.

Documents

Technical documentation and resources