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Technical Specifications
Parameters and characteristics for this part
| Specification | CD74ACT273E |
|---|---|
| Clock Frequency | 85 MHz |
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Iq) | 8 ÁA |
| Input Capacitance | 10 pF |
| Max Propagation Delay @ V, Max CL | 13.5 ns |
| Mounting Type | Through Hole |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Non-Inverted |
| Package / Case | 20-DIP |
| Package / Case | 7.62 mm |
| Package / Case | 0.3 in |
| Supplier Device Package | 20-PDIP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 1.62 | |
| 20 | $ 1.45 | |||
| 40 | $ 1.37 | |||
| 100 | $ 1.17 | |||
| 260 | $ 1.10 | |||
| 383 | $ 0.78 | |||
| 500 | $ 0.96 | |||
| 1000 | $ 0.80 | |||
| 2500 | $ 0.74 | |||
| 5000 | $ 0.71 | |||
| Newark | Each | 1 | $ 2.10 | |
| 10 | $ 1.94 | |||
| 40 | $ 1.82 | |||
| 60 | $ 1.74 | |||
| 100 | $ 1.63 | |||
| 260 | $ 1.55 | |||
| 500 | $ 1.53 | |||
| Texas Instruments | TUBE | 1 | $ 1.48 | |
| 100 | $ 1.14 | |||
| 250 | $ 0.84 | |||
| 1000 | $ 0.60 | |||
Description
General part information
CD74ACT273 Series
The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.
The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.
Documents
Technical documentation and resources
