
M95128-DRMN8TP/K
Active128-KBIT SERIAL SPI BUS EEPROM WITH HIGH SPEED CLOCK 105°C OPERATION
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M95128-DRMN8TP/K
Active128-KBIT SERIAL SPI BUS EEPROM WITH HIGH SPEED CLOCK 105°C OPERATION
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Technical Specifications
Parameters and characteristics for this part
| Specification | M95128-DRMN8TP/K |
|---|---|
| Clock Frequency | 20 MHz |
| Grade | Automotive |
| Memory Format | EEPROM |
| Memory Interface | SPI |
| Memory Organization | 16K x 8 |
| Memory Size | 16 kB |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 0.154 in |
| Package / Case | 8-SOIC |
| Package / Case | 3.9 mm |
| Qualification | AEC-Q100 |
| Supplier Device Package | 8-SO |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.8 V |
| Write Cycle Time - Word, Page | 4 ms |
Pricing
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Description
General part information
M95128-DRE Series
The M95128-DRE is a 128-Kbit serial EEPROM device operating up to 105 °C. The M95128-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95128-DRE is a byte-alterable memory (16384 × 8 bits) organized as 256 pages of 64 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
Documents
Technical documentation and resources