
ADS8588SEVM-PDK
ActiveADS8588S EVALUATION MODULE
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ADS8588SEVM-PDK
ActiveADS8588S EVALUATION MODULE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS8588SEVM-PDK |
|---|---|
| Data Interface | Parallel, Serial |
| Input Range | 10 V |
| Number of A/D Converters | 8 |
| Number of Bits | 16 |
| Sampling Rate (Per Second) | 200k |
| Supplied Contents | Board(s) |
| Utilized IC / Part | ADS8588S |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1 | $ 239.99 | |
Description
General part information
ADS8588S Series
The ADS8588S device is an 8-channel, integrated data acquisition (DAQ) system based on a simultaneous-sampling, 16-bit successive approximation (SAR) analog-to-digital converter (ADC) operating at a maximum of 200 kSPS per channel. The device features a complete analog front-end for each channel, including a programmable gain amplifier (PGA) with high input impedance of 1 MΩ, input clamp, low-pass filter, and an ADC input driver. The device also features a low-drift, precision reference with a buffer to drive the ADC. A flexible digital interface supporting serial, parallel, and parallel byte communication enables the device to be used with a variety of host controllers.
The ADS8588S can be configured to accept ±10-V or ±5-V true bipolar inputs using a single 5-V supply. The high input impedance allows direct connection with sensors and transformers, thus eliminating the need for external driver circuits. The high performance and accuracy, along with zero-latency conversions offered by this device, also make the ADS8588S a great choice for many industrial automation and control applications.
The ADS8588S device is an 8-channel, integrated data acquisition (DAQ) system based on a simultaneous-sampling, 16-bit successive approximation (SAR) analog-to-digital converter (ADC) operating at a maximum of 200 kSPS per channel. The device features a complete analog front-end for each channel, including a programmable gain amplifier (PGA) with high input impedance of 1 MΩ, input clamp, low-pass filter, and an ADC input driver. The device also features a low-drift, precision reference with a buffer to drive the ADC. A flexible digital interface supporting serial, parallel, and parallel byte communication enables the device to be used with a variety of host controllers.
Documents
Technical documentation and resources