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16-TSSOP
Integrated Circuits (ICs)

DS90LV049HMTX/NOPB

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Texas Instruments

HIGH TEMPERATURE 3-V LVDS DUAL LINE DRIVER AND RECEIVER PAIR

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16-TSSOP
Integrated Circuits (ICs)

DS90LV049HMTX/NOPB

Active
Texas Instruments

HIGH TEMPERATURE 3-V LVDS DUAL LINE DRIVER AND RECEIVER PAIR

Technical Specifications

Parameters and characteristics for this part

SpecificationDS90LV049HMTX/NOPB
Data Rate400 Mbps
DuplexFull
Mounting TypeSurface Mount
Number of Drivers/Receivers [custom]2
Number of Drivers/Receivers [custom]2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
ProtocolLVDS
Supplier Device Package16-TSSOP
TypeTransceiver
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.84
10$ 2.55
25$ 2.40
100$ 2.05
250$ 1.92
500$ 1.68
1000$ 1.39
Digi-Reel® 1$ 2.84
10$ 2.55
25$ 2.40
100$ 2.05
250$ 1.92
500$ 1.68
1000$ 1.39
Tape & Reel (TR) 2500$ 1.30
5000$ 1.25
Texas InstrumentsLARGE T&R 1$ 2.13
100$ 1.76
250$ 1.26
1000$ 0.95

Description

General part information

DS90LV049Q-Q1 Series

The DS90LV049H is a dual CMOS differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV049H TSSOP package allows for flow-through routing for easy PCB layout.

The DS90LV049H drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3-V CMOS signals. The LVDS input buffers have internal fail-safe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049H supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN andENinputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.